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| 1 | +# Copyright 2026 Nordic Semiconductor ASA |
| 2 | +# SPDX-License-Identifier: Apache-2.0 |
| 3 | + |
| 4 | +""" |
| 5 | +Generate an Intel HEX file containing nRF71 UICR register values |
| 6 | +read from a Zephyr edtlib.EDT pickle. |
| 7 | +""" |
| 8 | + |
| 9 | +import argparse |
| 10 | +import pickle |
| 11 | +import struct |
| 12 | +import sys |
| 13 | +from pathlib import Path |
| 14 | + |
| 15 | +from intelhex import IntelHex |
| 16 | + |
| 17 | +UICR_COMPATIBLE = "nordic,nrf71-uicr" |
| 18 | + |
| 19 | +# ── Field table ────────────────────────────────────────────────────── |
| 20 | +# |
| 21 | +# Each entry describes one UICR register field configurable via DTS. |
| 22 | +# |
| 23 | +# property – DTS property name (must match the binding YAML) |
| 24 | +# offset – byte offset from UICR base |
| 25 | +# mask – bit mask of the field within the 32-bit register |
| 26 | +# encoding – maps DTS string values to integer field values |
| 27 | +# reset – 32-bit reset value |
| 28 | +# |
| 29 | +# The full register word is computed as: |
| 30 | +# word = (reset & ~mask) | (encoding[value] & mask) |
| 31 | +# |
| 32 | + |
| 33 | +UICR_FIELDS = [ |
| 34 | + { |
| 35 | + "property": "supply-config1v8", |
| 36 | + "offset": 0x400, |
| 37 | + "mask": 0x00000003, |
| 38 | + "encoding": { |
| 39 | + "normal": 0, |
| 40 | + "external": 1, |
| 41 | + "high-load": 2, |
| 42 | + }, |
| 43 | + "reset": 0xFFFFFFFF, |
| 44 | + }, |
| 45 | +] |
| 46 | + |
| 47 | + |
| 48 | +def setup_devicetree_path(zephyr_base): |
| 49 | + """Add the devicetree package to sys.path so EDT can be unpickled.""" |
| 50 | + |
| 51 | + devicetree_path = Path(zephyr_base) / "scripts/dts/python-devicetree/src" |
| 52 | + if not devicetree_path.is_dir(): |
| 53 | + sys.exit(f"Devicetree path does not exist: {devicetree_path}") |
| 54 | + sys.path.insert(0, str(devicetree_path)) |
| 55 | + |
| 56 | + |
| 57 | +def parse_uicr(args): |
| 58 | + setup_devicetree_path(args.zephyr_base) |
| 59 | + |
| 60 | + with open(args.edt_pickle, "rb") as f: |
| 61 | + edt = pickle.load(f) |
| 62 | + |
| 63 | + # Find the UICR node. |
| 64 | + uicr_nodes = edt.compat2okay.get(UICR_COMPATIBLE, []) |
| 65 | + if not uicr_nodes: |
| 66 | + IntelHex().write_hex_file(args.output) |
| 67 | + return |
| 68 | + |
| 69 | + uicr = uicr_nodes[0] |
| 70 | + base = uicr.regs[0].addr |
| 71 | + |
| 72 | + ih = IntelHex() |
| 73 | + |
| 74 | + for field in UICR_FIELDS: |
| 75 | + prop = uicr.props.get(field["property"]) |
| 76 | + if prop is None: |
| 77 | + continue |
| 78 | + |
| 79 | + val_str = prop.val |
| 80 | + encoding = field["encoding"] |
| 81 | + if val_str not in encoding: |
| 82 | + valid = ", ".join(f'"{k}"' for k in encoding) |
| 83 | + sys.exit(f"Unknown value '{val_str}' for '{field['property']}'. Expected: {valid}") |
| 84 | + |
| 85 | + mask = field["mask"] |
| 86 | + word = (field["reset"] & ~mask) | (encoding[val_str] & mask) |
| 87 | + addr = base + field["offset"] |
| 88 | + ih.puts(addr, struct.pack("<I", word)) |
| 89 | + |
| 90 | + ih.write_hex_file(args.output) |
| 91 | + |
| 92 | + |
| 93 | +if __name__ == "__main__": |
| 94 | + parser = argparse.ArgumentParser(description=__doc__, allow_abbrev=False) |
| 95 | + parser.add_argument( |
| 96 | + "--zephyr-base", |
| 97 | + required=True, |
| 98 | + help="Path to the Zephyr base directory", |
| 99 | + ) |
| 100 | + parser.add_argument( |
| 101 | + "--edt-pickle", |
| 102 | + required=True, |
| 103 | + help="Path to the main application's EDT pickle file", |
| 104 | + ) |
| 105 | + parser.add_argument( |
| 106 | + "--output", |
| 107 | + required=True, |
| 108 | + help="Path for the output Intel HEX file", |
| 109 | + ) |
| 110 | + args = parser.parse_args() |
| 111 | + |
| 112 | + parse_uicr(args) |
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