Merge pull request #64 from Thomas-Vreys/wavedrom-bitfield-bug

Wavedrom bitfield bug

Author: oddball

Makefile

@@ -55,6 +55,12 @@ gen:
 	ipxact2md --srcFile example/input/test2.xml --destDir example/output
 	ipxact2c --srcFile example/input/test2.xml --destDir example/output
 
+	cp example/output/example2.rst example/output_sphinx2
+	ipxact2rst --srcFile example/input/test2.xml --destDir example/output_sphinx2  --config example/input/sphinx.ini
+	sphinx-build example/output_sphinx2 example/output_sphinx2/build -q -b latex
+	make -C example/output_sphinx2/build
+	cp example/output_sphinx2/build/example2.pdf example/output_sphinx2/example2.pdf
+
 
 compile: 
 	test -d work || vlib work

example/output_sphinx2/conf.py

@@ -0,0 +1,22 @@
+# Configuration file for the Sphinx documentation builder.
+#
+# For the full list of built-in configuration values, see the documentation:
+# https://www.sphinx-doc.org/en/master/usage/configuration.html
+
+# -- Project information -----------------------------------------------------
+# https://www.sphinx-doc.org/en/master/usage/configuration.html#project-information
+
+project = 'example2'
+copyright = '2023, IEEE'
+author = 'ipxact2systemverilog'
+
+# -- General configuration ---------------------------------------------------
+# https://www.sphinx-doc.org/en/master/usage/configuration.html#general-configuration
+
+extensions = ['sphinxcontrib.wavedrom']
+
+templates_path = ['_templates']
+exclude_patterns = ['_build', 'Thumbs.db', '.DS_Store']
+
+# Use the Python implementation of wavedrom-cli and not the npx one
+render_using_wavedrompy = True

example/output_sphinx2/example2.pdf

@@ -0,0 +1,94 @@
+========
+example2
+========
+
+Second demo example used for the testing of the ipxact2systemverilog
+tool.
+
+:Base Address: 0x0
+
+Registers
+---------
+
++-----------+-----------------+--------------------------------+
+| Address   | Register Name   | Description                    |
++===========+=================+================================+
+| 0x00      | reg0_           | read something useful for reg0 |
++-----------+-----------------+--------------------------------+
+| 0x01      | reg1_           |                                |
++-----------+-----------------+--------------------------------+
+
+reg0
+----
+
+:Name: reg0
+:Address: 0x0
+:Access: read-only
+:Description: read something useful for reg0
+
+.. wavedrom::
+   :alt: reg0
+
+   {
+    "reg": [
+     {
+      "name": "field0",
+      "bits": 2
+     },
+     {
+      "name": "field1",
+      "bits": 6
+     }
+    ],
+    "config": {
+     "lanes": 1,
+     "bits": 8
+    }
+   }
+
+
++--------+--------------+----------------------------------+
+| Bits   | Field name   | Description                      |
++========+==============+==================================+
+| [7:2]  | field1       | read something useful for field1 |
++--------+--------------+----------------------------------+
+| [1:0]  | field0       | read something useful for field0 |
++--------+--------------+----------------------------------+
+
+reg1
+----
+
+:Name: reg1
+:Address: 0x1
+:Access: read-only
+:Description:
+
+.. wavedrom::
+   :alt: reg1
+
+   {
+    "reg": [
+     {
+      "name": "field0",
+      "bits": 8
+     }
+    ],
+    "config": {
+     "lanes": 1,
+     "bits": 8
+    }
+   }
+
+
++--------+--------------+----------------------------------+
+| Bits   | Field name   | Description                      |
++========+==============+==================================+
+| [7:0]  | field0       | read something useful for field0 |
++--------+--------------+----------------------------------+
+
+field0
+~~~~~~
+
+:Minimum: 0x00
+:Maximum: 0x07
+

example/output_sphinx2/example2.rst

@@ -0,0 +1,13 @@
+.. IPXACT documentation master file, created by
+   sphinx-quickstart on Sat Oct 14 18:45:45 2023.
+   You can adapt this file completely to your liking, but it should at least
+   contain the root `toctree` directive.
+
+Welcome to IPXACT's documentation!
+==================================
+
+.. toctree::
+   :maxdepth: 2
+   :caption: Contents:
+
+   example2.rst

example/output_sphinx2/index.rst

@@ -297,7 +297,8 @@ def returnAsString(self):
                     py.append(f)
 
                 wd = {'reg': py,
-                      'config': {'lanes': reg.size//8}}
+                      'config': {'lanes': reg.size//8,
+                                 'bits': reg.size,}}
                 r.newline()
                 r.directive(name="wavedrom",
                             fields=[("alt", reg.name)],