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olofkolofk
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Prepare for release
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‎.github/workflows/openlane.yml‎

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@@ -6,7 +6,7 @@ jobs:
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runs-on: ubuntu-latest
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env:
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REPO : serv
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VLNV : serv
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VLNV : award-winning:serv:serv
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steps:
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- name: Checkout repo
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uses: actions/checkout@v4
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- run: echo "EDALIZE_LAUNCHER=el_docker" >> $GITHUB_ENV
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- run: pip3 install fusesoc
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- run: fusesoc library add $REPO $GITHUB_WORKSPACE/$REPO
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- run: fusesoc run --target=sky130 $VLNV
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- run: fusesoc run --target=sky130 --work-root=openlane_work $VLNV
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- run: find -name *.gds
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- name: Store artifacts
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uses: actions/upload-artifact@v4
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with:
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name: serv.gds
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path: build/serv_1.3.0/sky130-openlane/runs/serv_synth_wrapper/results/finishing/serv_synth_wrapper.gds
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path: openlane_work/runs/serv_synth_wrapper/results/finishing/serv_synth_wrapper.gds
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‎NEWS‎

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1.4.0 2025-10-15 Olof Kindgren
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======================================================
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* Zephyr BSP: Port to Zephyr 4.0.0
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* Fix mstatus[mpp] field
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* Fix misa and mstatus being triggered at the same time
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* Add documentation for extension interface
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* Add Subservient documentation
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* Add 4-bit mode (QERV)
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* Add simulation debug module
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* New servant ports: Trenz Electronic TE0802
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* Make slt, branches and shifts one cycle faster
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1.3.0 2024-07-05 Olof Kindgren
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======================================================
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‎README.md‎

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@@ -89,7 +89,7 @@ Each of the following commands should be run from the workspace directory:
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If everything worked, the output should look like
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INFO: Preparing ::serv:1.3.0
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INFO: Preparing award-winning:serv:serv:1.4.0
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INFO: Setting up project
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INFO: Building simulation model

‎doc/servant.rst‎

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Pin 95 is used as the GPIO output which is connected to the board's green LED. Due to this board's limited Embedded BRAM, programs with a maximum of 7168 bytes can be loaded. The default program for this board is blinky.hex.
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fusesoc run --target=icestick servant
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iceprog build/servant_1.3.0/icestick-icestorm/servant_1.3.0.bin
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iceprog build/servant_1.4.0/icestick-icestorm/servant_1.4.0.bin
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iCESugar
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^^^^^^^^
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fusesoc run --target=icev_wireless servant
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iceprog build/servant_1.3.0/icestick-icestorm/servant_1.3.0.bin
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iceprog build/servant_1.4.0/icestick-icestorm/servant_1.4.0.bin
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GMM7550
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^^^^^^^
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fusesoc run --target=machdyne_kolibri servant
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ldprog -Ks build/servant_1.3.0/machdyne_kolibri-icestorm/servant_1.3.0.bin
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ldprog -Ks build/servant_1.4.0/machdyne_kolibri-icestorm/servant_1.4.0.bin
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MAX10 10M08 Evaluation Kit
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^^^^^^^^^^^^^^^^^^^^^^^^^^
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Pin 56 is used as the GPIO output which is connected to the board's LED1. Due to this board's limited Embedded BRAM, programs with a maximum of 7168 bytes can be loaded. The default program for this board is blinky.hex.
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fusesoc run --target=go_board servant
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iceprog build/servant_1.3.0/go_board-icestorm/servant_1.3.0.bin
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iceprog build/servant_1.4.0/go_board-icestorm/servant_1.4.0.bin
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Nexys 2
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Pin D1 is used for UART output with 115200 baud rate.
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fusesoc run --target=orangecrab_r0.2 servant
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dfu-util -d 1209:5af0 -D build/servant_1.3.0/orangecrab_r0.2-trellis/servant_1.3.0.bit
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dfu-util -d 1209:5af0 -D build/servant_1.4.0/orangecrab_r0.2-trellis/servant_1.4.0.bit
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PolarFire Splash Kit
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^^^^^^^^^^^^^^^^^^^^

‎serv.core‎

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CAPI=2:
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name : ::serv:1.3.0
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name : award-winning:serv:serv:1.4.0
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description: The award-winning SERV, the world's smallest RISC-V CPU
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license: ISC
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filesets:
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core:

‎servant.core‎

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CAPI=2:
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name : ::servant:1.3.0
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name : award-winning:serv:servant:1.4.0
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description: Simple reference system for SERV
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license: ISC
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filesets:
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# Common filesets
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- "!tool_quartus? (servant/servant_ram.v)"
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- servant/servant.v
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file_type : verilogSource
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depend : [servile, "mdu? (mdu)"]
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depend : [award-winning:serv:servile, "mdu? (mdu)"]
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verilator_tb:
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files:

‎servile.core‎

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CAPI=2:
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name : ::servile:1.3.0
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name : award-winning:serv:servile:1.4.0
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description: Convenience wrapper for SERV
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license: ISC
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filesets:
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rtl:
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- servile/servile_arbiter.v
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- servile/servile.v
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file_type: verilogSource
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depend : [serv]
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depend : [award-winning:serv:serv]
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targets:
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default:

‎serving.core‎

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CAPI=2:
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name : ::serving:1.3.0
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name : award-winning:serv:serving:1.4.0
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description: SERV-based subsystem for FPGAs
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license: ISC
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filesets:
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rtl:
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files:
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- serving/serving_ram.v
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- serving/serving.v
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file_type : verilogSource
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depend : [servile]
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depend : [award-winning:serv:servile]
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targets:
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default:

‎verif/plugin-serv/riscof_serv.py‎

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class serv(pluginTemplate):
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__model__ = "serv"
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__version__ = "1.3.0"
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__version__ = "1.4.0"
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def __init__(self, *args, **kwargs):
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sclass = super().__init__(*args, **kwargs)
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utils.shellCommand(add_mdu).run()
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build_serv = 'fusesoc run --target=verilator_tb --flag=mdu\
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--build --build-root=servant_test servant\
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--build --work-root=servant_test award-winning:serv:servant\
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--memsize=8388608 --compressed=1'
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utils.shellCommand(build_serv).run()
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#The behavior of --build-root in FuseSoC has changed since version 2.2.1
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#Check first for executable model in the new location and else fall back
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#to the old one
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exe = 'servant_test/verilator_tb/Vservant_sim'
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if not os.path.exists(exe):
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exe = 'servant_test/servant_1.3.0/verilator_tb/Vservant_sim'
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exe = 'servant_test/Vservant_sim'
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sigdump_run = [exe,
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"+timeout=1000000000",

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