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Merge branch 'master' into fix-3170
2 parents 0d15359 + 3868a61 commit f1efeb5

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core/include/cv64a60ax_config_pkg_cvfpu-uvm.sv

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@@ -64,6 +64,7 @@ package cva6_config_pkg;
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CoproType: config_pkg::COPRO_EXAMPLE,
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RVZiCond: bit'(1),
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RVZicntr: bit'(1),
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RVZiCbom: bit'(1),
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RVZihpm: bit'(1),
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NrScoreboardEntries: unsigned'(8),
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PerfCounterEn: bit'(1),
@@ -104,6 +105,11 @@ package cva6_config_pkg;
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CachedRegionLength: 1024'({64'h2_0000_0000, 64'h1_0000}),
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MaxOutstandingStores: unsigned'(7),
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DebugEn: bit'(1),
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SDTRIG: bit'(0),
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Mcontrol6: bit'(0),
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Icount: bit'(0),
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Etrigger: bit'(0),
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Itrigger: bit'(0),
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AxiBurstWriteEn: bit'(1),
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IcacheByteSize: unsigned'(32768),
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IcacheSetAssoc: unsigned'(8),
@@ -113,6 +119,7 @@ package cva6_config_pkg;
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DcacheSetAssoc: unsigned'(8),
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DcacheLineWidth: unsigned'(512),
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DcacheFlushOnFence: bit'(0),
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DcacheFlushOnFenceI: bit'(0),
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DcacheInvalidateOnFlush: bit'(0),
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DataUserEn: unsigned'(0),
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WtDcacheWbufDepth: int'(8),
@@ -121,6 +128,7 @@ package cva6_config_pkg;
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InstrTlbEntries: int'(16),
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DataTlbEntries: int'(16),
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UseSharedTlb: bit'(0),
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SvnapotEn: bit'(0),
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SharedTlbDepth: int'(64),
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NrLoadPipeRegs: int'(0),
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NrStorePipeRegs: int'(0),

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