Crash when trying to connect openocd to simulation

[artakarakelyan]

I'm trying to connect openocd to questasim or verilator simulation.

The project files are checked out from v4.2.0 tag.

./work-ver/Variane_testharness $RISCV/riscv64-unknown-elf/bin/pk hello.elf +jtag_rbb_enable=1
or
make sim elf-bin=$RISCV/riscv64-unknown-elf/bin/pk target-options=hello.elf batch-mode=1 rbb=1

Then after the port number is reported in console I run openocd from another console.

BBPORT=33523 openocd -f bitbang.cfg
Open On-Chip Debugger 0.10.0+dev-00198-g35eed36ff (2022-12-19-23:37)
Licensed under GNU GPL v2
For bug reports, read
http://openocd.org/doc/doxygen/bugs.html
Warn : Adapter driver 'remote_bitbang' did not declare which transports it allows; assuming legacy JTAG-only
Info : only one transport option; autoselect 'jtag'
Info : Initializing remote_bitbang driver
Info : Connecting to localhost:33523
Info : remote_bitbang driver initialized
Info : This adapter doesn't support configurable speed
Info : JTAG tap: riscv.cpu tap/device found: 0x00000001 (mfg: 0x000 (), part: 0x0000, ver: 0x0)
Info : Listening on port 3333 for gdb connections
Error: Target not examined yet

Segmentation fault (core dumped)

Here is the .cfg file

$ cat bitbang.cfg
interface remote_bitbang
remote_bitbang_host localhost
remote_bitbang_port $env(BBPORT)
set _CHIPNAME riscv
jtag newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00000001
set _TARGETNAME $_CHIPNAME.cpu
target create $_TARGETNAME riscv -chain-position $_TARGETNAME
gdb_report_data_abort enable
init
halt

How I can avoid this issue, is there any stable version of riscv-openocd ?