From 2a5ed88529ce5f2c51b62901bcc16138564ad223 Mon Sep 17 00:00:00 2001 From: youssef Date: Fri, 27 Mar 2020 15:35:49 +0100 Subject: [PATCH 01/51] develop_FW-871 I just created two files , a header file and main file for using SPI bus. --- projects/openmote-b/00std_spi/00std_spi.c.txt | 0 projects/openmote-b/00std_spi/00std_spi.h.txt | 0 2 files changed, 0 insertions(+), 0 deletions(-) create mode 100644 projects/openmote-b/00std_spi/00std_spi.c.txt create mode 100644 projects/openmote-b/00std_spi/00std_spi.h.txt diff --git a/projects/openmote-b/00std_spi/00std_spi.c.txt b/projects/openmote-b/00std_spi/00std_spi.c.txt new file mode 100644 index 0000000000..e69de29bb2 diff --git a/projects/openmote-b/00std_spi/00std_spi.h.txt b/projects/openmote-b/00std_spi/00std_spi.h.txt new file mode 100644 index 0000000000..e69de29bb2 From fa96403543829f133dc4429027f675e32df061fd Mon Sep 17 00:00:00 2001 From: youssef Date: Fri, 27 Mar 2020 15:47:57 +0100 Subject: [PATCH 02/51] testing modification --- projects/openmote-b/00std_spi/00std_spi.c.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/projects/openmote-b/00std_spi/00std_spi.c.txt b/projects/openmote-b/00std_spi/00std_spi.c.txt index e69de29bb2..6724ae374e 100644 --- a/projects/openmote-b/00std_spi/00std_spi.c.txt +++ b/projects/openmote-b/00std_spi/00std_spi.c.txt @@ -0,0 +1 @@ +#include \ No newline at end of file From 672a87430f2e586e1659c722e2dc4744184a5741 Mon Sep 17 00:00:00 2001 From: youssef Date: Thu, 2 Apr 2020 15:29:02 +0200 Subject: [PATCH 03/51] New modification concerning the GPIOs that will be used as SSI1. These GPIOs are the ones that exist in the external connector. --- projects/openmote-b/00std_spi/00std_spi.c | 210 ++++++++++++++++++ projects/openmote-b/00std_spi/00std_spi.c.txt | 1 - projects/openmote-b/00std_spi/00std_spi.h.txt | 0 3 files changed, 210 insertions(+), 1 deletion(-) create mode 100644 projects/openmote-b/00std_spi/00std_spi.c delete mode 100644 projects/openmote-b/00std_spi/00std_spi.c.txt delete mode 100644 projects/openmote-b/00std_spi/00std_spi.h.txt diff --git a/projects/openmote-b/00std_spi/00std_spi.c b/projects/openmote-b/00std_spi/00std_spi.c new file mode 100644 index 0000000000..4cfc4cc3a1 --- /dev/null +++ b/projects/openmote-b/00std_spi/00std_spi.c @@ -0,0 +1,210 @@ +/** +\brief definition of the "spi" bsp module. +\author Xavier Vilajosana , September 2017. +*/ +#include "board.h" +#include "board_info.h" +#include "ssi.h" +#include "spi.h" +#include "gpio.h" +#include "ioc.h" +#include "sys_ctrl.h" + +#include +#include +#include +#include +#include +#include + + +//=========================== defines ========================================= +#define SPI_PIN_SSI_CLK GPIO_PIN_0 // CLK +#define SPI_PIN_SSI_FSS GPIO_PIN_1 // CSn +#define SPI_PIN_SSI_RX GPIO_PIN_2 // MISO +#define SPI_PIN_SSI_TX GPIO_PIN_3 // MOSI +#define SPI_GPIO_SSI_BASE GPIO_B_BASE + +//=========================== variables ======================================= + +typedef struct { + // information about the current transaction + uint8_t* pNextTxByte; + uint16_t numTxedBytes; + uint16_t txBytesLeft; + spi_return_t returnType; + uint8_t* pNextRxByte; + uint16_t maxRxBytes; + spi_first_t isFirst; + spi_last_t isLast; + // state of the module + uint8_t busy; +#ifdef SPI_IN_INTERRUPT_MODE + // callback when module done + spi_cbt callback; +#endif +} spi_vars_t; + +spi_vars_t spi_vars; + +//=========================== prototypes ====================================== +static void disableInterrupts(void); +static void enableInterrupts(void); +//=========================== public ========================================== + +void spi_init() { + // clear variables + memset(&spi_vars,0,sizeof(spi_vars_t)); + + // set the clk miso and cs pins as output + GPIOPinTypeGPIOOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK); + GPIOPinTypeGPIOOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX); + GPIOPinTypeGPIOOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS); + + //set cs to high + GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, SPI_PIN_SSI_FSS); + //set pins to low + GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX, 0); + GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK, 0); + + SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_SSI1); + SysCtrlPeripheralSleepEnable(SYS_CTRL_PERIPH_SSI1); + SysCtrlPeripheralDeepSleepDisable(SYS_CTRL_PERIPH_SSI1); + + SSIDisable(SSI1_BASE); + SSIClockSourceSet(SSI1_BASE, SSI_CLOCK_PIOSC); + + IOCPinConfigPeriphOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK, IOC_MUX_OUT_SEL_SSI1_CLKOUT); + IOCPinConfigPeriphOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX, IOC_MUX_OUT_SEL_SSI1_TXD); + IOCPinConfigPeriphInput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX, IOC_SSIRXD_SSI1); + + GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK ); + GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX ); + GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX ); + + SSIConfigSetExpClk(SSI1_BASE, SysCtrlIOClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, /*SysCtrlIOClockGet()/2*/16000000, 8 /*bits*/); + + // Enable the SSI1 module. + SSIEnable(SSI1_BASE); +} + +#ifdef SPI_IN_INTERRUPT_MODE +void spi_setCb(spi_cbt cb) { + spi_vars.spi_cb = cb; +} +#endif + +void spi_txrx(uint8_t* bufTx, + uint16_t lenbufTx, + spi_return_t returnType, + uint8_t* bufRx, + uint16_t maxLenBufRx, + spi_first_t isFirst, + spi_last_t isLast) { + + uint32_t data,i; + GPIOPinWrite(GPIO_C_BASE, GPIO_PIN_3, GPIO_PIN_3); + // register spi frame to send + spi_vars.pNextTxByte = bufTx; + spi_vars.numTxedBytes = 0; + spi_vars.txBytesLeft = lenbufTx; + spi_vars.returnType = returnType; + spi_vars.pNextRxByte = bufRx; + spi_vars.maxRxBytes = maxLenBufRx; + spi_vars.isFirst = isFirst; + spi_vars.isLast = isLast; + + // SPI is now busy + spi_vars.busy = 1; + + // lower CS signal to have slave listening + if (spi_vars.isFirst==SPI_FIRST) { + GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, 0); + } + + for ( i = 0; i < lenbufTx; i++) + { + // Push a byte + SSIDataPut(SSI1_BASE, spi_vars.pNextTxByte[i]); + + // Wait until it is complete + while(SSIBusy(SSI1_BASE)); + + // Read a byte + SSIDataGet(SSI1_BASE, &data); + + // Store the result + spi_vars.pNextRxByte[i] = (uint8_t)(data & 0xFF); + // one byte less to go + } + + if (spi_vars.isLast==SPI_LAST) { + GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, SPI_PIN_SSI_FSS); + } + + // SPI is not busy anymore + spi_vars.busy = 0; + GPIOPinWrite(GPIO_C_BASE, GPIO_PIN_3, 0); +} + +//=========================== private ========================================= + +port_INLINE void enableInterrupts(void) +{ + // Enable the SPI interrupt + SSIIntEnable(SSI1_BASE, (SSI_TXFF | SSI_RXFF | SSI_RXTO | SSI_RXOR)); + + // Enable the SPI interrupt + IntEnable(INT_SSI1); +} + +port_INLINE void disableInterrupts(void) +{ + // Disable the SPI interrupt + SSIIntDisable(SSI1_BASE, (SSI_TXFF | SSI_RXFF | SSI_RXTO | SSI_RXOR)); + + // Disable the SPI interrupt + IntDisable(INT_SSI1); +} + +//=========================== interrupt handlers ============================== + +kick_scheduler_t spi_isr() { +#ifdef SPI_IN_INTERRUPT_MODE + uint32_t data; + // save the byte just received in the RX buffer + status = SSIIntStatus(SSI1_BASE, true); + + // Clear SPI interrupt in the NVIC + IntPendClear(INT_SSI1); + + SSIDataGet(SSI1_BASE, &data); + + // Store the result + spi_vars.pNextRxByte = (uint8_t)(data & 0xFF); + + // one byte less to go + spi_vars.pNextTxByte++; + spi_vars.pNextRxByte++; + spi_vars.txBytesLeft--; + + if (spi_vars.txBytesLeft>0) { + // write next byte to TX buffer + SSIDataPut(SSI1_BASE, *spi_vars.pNextTxByte); + + } else { + // SPI is not busy anymore + spi_vars.busy = 0; + + // SPI is done! + if (spi_vars.callback!=NULL) { + // call the callback + spi_vars.spi_cb(); + // kick the OS + return KICK_SCHEDULER; + } + } + +#endif + return DO_NOT_KICK_SCHEDULER; +} diff --git a/projects/openmote-b/00std_spi/00std_spi.c.txt b/projects/openmote-b/00std_spi/00std_spi.c.txt deleted file mode 100644 index 6724ae374e..0000000000 --- a/projects/openmote-b/00std_spi/00std_spi.c.txt +++ /dev/null @@ -1 +0,0 @@ -#include \ No newline at end of file diff --git a/projects/openmote-b/00std_spi/00std_spi.h.txt b/projects/openmote-b/00std_spi/00std_spi.h.txt deleted file mode 100644 index e69de29bb2..0000000000 From 93c585656f931b72fec64e7b16ac819c1370ae04 Mon Sep 17 00:00:00 2001 From: youssef Date: Wed, 8 Apr 2020 16:23:28 +0200 Subject: [PATCH 04/51] New modified comments --- projects/openmote-b/00std_spi/00std_spi.c | 34 +++++++++++++++++++---- 1 file changed, 29 insertions(+), 5 deletions(-) diff --git a/projects/openmote-b/00std_spi/00std_spi.c b/projects/openmote-b/00std_spi/00std_spi.c index 4cfc4cc3a1..507ee20961 100644 --- a/projects/openmote-b/00std_spi/00std_spi.c +++ b/projects/openmote-b/00std_spi/00std_spi.c @@ -47,6 +47,11 @@ typedef struct { spi_vars_t spi_vars; +//*********Variables to use as parameters of spi_txrx function****************// + +/*static char stringToPrint[]="MessageToTest\r\n"; +size_t len = strlen(stringToPrint);*/ + //=========================== prototypes ====================================== static void disableInterrupts(void); static void enableInterrupts(void); @@ -56,36 +61,55 @@ void spi_init() { // clear variables memset(&spi_vars,0,sizeof(spi_vars_t)); - // set the clk miso and cs pins as output + // set the clk miso and cs pins as Software-controlled outputs (configures GPIO_AFSEL and GPIO_DIR ) + // Only FSS can be used as SOFTWARE controlled OUTPUT GPIOPinTypeGPIOOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK); GPIOPinTypeGPIOOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX); GPIOPinTypeGPIOOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS); + // set the Miso pin as input + GPIOPinTypeGPIOInput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX); - //set cs to high + //set cs to high (writes into GPIO_DATA) GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, SPI_PIN_SSI_FSS); + //set pins to low GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX, 0); GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK, 0); + //Configuration of SSI1 peripheral SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_SSI1); SysCtrlPeripheralSleepEnable(SYS_CTRL_PERIPH_SSI1); SysCtrlPeripheralDeepSleepDisable(SYS_CTRL_PERIPH_SSI1); + //Disabling SSI (writes into SSI_CR1) SSIDisable(SSI1_BASE); + + //Set clock source SSIClockSourceSet(SSI1_BASE, SSI_CLOCK_PIOSC); + /*Configure output signal to IOC_Pxx_SEL register + Each signal is identified with its address table 9.1 in T.I datasheet*/ IOCPinConfigPeriphOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK, IOC_MUX_OUT_SEL_SSI1_CLKOUT); IOCPinConfigPeriphOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX, IOC_MUX_OUT_SEL_SSI1_TXD); + IOCPinConfigPeriphOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, IOC_MUX_OUT_SEL_SSI1_FSSOUT); + //Configures hardware peripheral input selection (i.e. IOC_SSIRXD_SSI1) IOCPinConfigPeriphInput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX, IOC_SSIRXD_SSI1); + //Set the pins as Hardware-controlled(AFSEL register) GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK ); GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX ); GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX ); + //FSS would be better to be controlled as software + GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS ); - SSIConfigSetExpClk(SSI1_BASE, SysCtrlIOClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, /*SysCtrlIOClockGet()/2*/16000000, 8 /*bits*/); + //Sets SSI_CR0, SSI_CR1, SSI_CPSR + SSIConfigSetExpClk(SSI1_BASE, SysCtrlIOClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, SysCtrlIOClockGet()/2/*16000000*/, 8); - // Enable the SSI1 module. + // Enable the SSI1 module(writes into CR1) SSIEnable(SSI1_BASE); + + //Call the spi_txrx function + //spi_txrx(&stringToPrint,len,) } #ifdef SPI_IN_INTERRUPT_MODE @@ -117,7 +141,7 @@ void spi_txrx(uint8_t* bufTx, // SPI is now busy spi_vars.busy = 1; - // lower CS signal to have slave listening + // lower CS signal to have slave listening (FSS is managed through software, not hardware) if (spi_vars.isFirst==SPI_FIRST) { GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, 0); } From 4f52a5d901a3d4d1cd33570f3ea14c7250b2a8ce Mon Sep 17 00:00:00 2001 From: youssef Date: Wed, 8 Apr 2020 17:10:19 +0200 Subject: [PATCH 05/51] New modified code wit new comments --- projects/openmote-b/00std_spi/00std_spi.c | 33 ++++++++++------------- 1 file changed, 14 insertions(+), 19 deletions(-) diff --git a/projects/openmote-b/00std_spi/00std_spi.c b/projects/openmote-b/00std_spi/00std_spi.c index 507ee20961..4e8cf923b8 100644 --- a/projects/openmote-b/00std_spi/00std_spi.c +++ b/projects/openmote-b/00std_spi/00std_spi.c @@ -61,31 +61,32 @@ void spi_init() { // clear variables memset(&spi_vars,0,sizeof(spi_vars_t)); - // set the clk miso and cs pins as Software-controlled outputs (configures GPIO_AFSEL and GPIO_DIR ) - // Only FSS can be used as SOFTWARE controlled OUTPUT - GPIOPinTypeGPIOOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK); - GPIOPinTypeGPIOOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX); + //Set the CLK , MOSI(TX) and MISO(RX) pins as Hardware-controlled (AFSEL register) + GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK ); + GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX ); + GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX ); + + //Set the SS pin as Software-controlled outputs (configures GPIO_AFSEL-->0 (software) and GPIO_DIR-->1 (Output) ) + //Only FSS can be used as SOFTWARE controlled OUTPUT GPIOPinTypeGPIOOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS); - // set the Miso pin as input - GPIOPinTypeGPIOInput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX); - //set cs to high (writes into GPIO_DATA) + //Set SS to High (writes into GPIO_DATA register) GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, SPI_PIN_SSI_FSS); - //set pins to low + /*//Set pins to low GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX, 0); - GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK, 0); + GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK, 0);*/ //Configuration of SSI1 peripheral SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_SSI1); SysCtrlPeripheralSleepEnable(SYS_CTRL_PERIPH_SSI1); SysCtrlPeripheralDeepSleepDisable(SYS_CTRL_PERIPH_SSI1); - //Disabling SSI (writes into SSI_CR1) + //Disabling SSI (writes into SSI_CR1 --> 0) SSIDisable(SSI1_BASE); - //Set clock source - SSIClockSourceSet(SSI1_BASE, SSI_CLOCK_PIOSC); + //Set clock source (The baud clock source for the SSI to select.) + SSIClockSourceSet(SSI1_BASE, SSI_CLOCK_PIOSC); //The precision internal oscillator /*Configure output signal to IOC_Pxx_SEL register Each signal is identified with its address table 9.1 in T.I datasheet*/ @@ -95,14 +96,8 @@ void spi_init() { //Configures hardware peripheral input selection (i.e. IOC_SSIRXD_SSI1) IOCPinConfigPeriphInput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX, IOC_SSIRXD_SSI1); - //Set the pins as Hardware-controlled(AFSEL register) - GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK ); - GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX ); - GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX ); - //FSS would be better to be controlled as software - GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS ); - //Sets SSI_CR0, SSI_CR1, SSI_CPSR + //Sets SSI_CR0 (SPI MODE), SSI_CR1(Protocol), SSI_CPSR(Clock prescaler divisor) SSIConfigSetExpClk(SSI1_BASE, SysCtrlIOClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, SysCtrlIOClockGet()/2/*16000000*/, 8); // Enable the SSI1 module(writes into CR1) From 7a6699853516bb30658708bdcf910031e878964c Mon Sep 17 00:00:00 2001 From: youssef Date: Thu, 9 Apr 2020 11:06:54 +0200 Subject: [PATCH 06/51] New modified code with new comments --- projects/openmote-b/00std_spi/00std_spi.c | 1 + 1 file changed, 1 insertion(+) diff --git a/projects/openmote-b/00std_spi/00std_spi.c b/projects/openmote-b/00std_spi/00std_spi.c index 4e8cf923b8..be80877ef0 100644 --- a/projects/openmote-b/00std_spi/00std_spi.c +++ b/projects/openmote-b/00std_spi/00std_spi.c @@ -98,6 +98,7 @@ void spi_init() { //Sets SSI_CR0 (SPI MODE), SSI_CR1(Protocol), SSI_CPSR(Clock prescaler divisor) + //According to the LoRaSX1276 datasheet, the corresponding mode is CPOL=0 , CPHA=0 which is FRF mode 0 SSIConfigSetExpClk(SSI1_BASE, SysCtrlIOClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, SysCtrlIOClockGet()/2/*16000000*/, 8); // Enable the SSI1 module(writes into CR1) From 641f9812ac888c06955397fcbe7d16910d5e0a3a Mon Sep 17 00:00:00 2001 From: youssef Date: Tue, 14 Apr 2020 13:21:47 +0200 Subject: [PATCH 07/51] New modified code with new comments --- projects/openmote-b/00std_spi/00std_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/projects/openmote-b/00std_spi/00std_spi.c b/projects/openmote-b/00std_spi/00std_spi.c index be80877ef0..d47d219b31 100644 --- a/projects/openmote-b/00std_spi/00std_spi.c +++ b/projects/openmote-b/00std_spi/00std_spi.c @@ -61,7 +61,7 @@ void spi_init() { // clear variables memset(&spi_vars,0,sizeof(spi_vars_t)); - //Set the CLK , MOSI(TX) and MISO(RX) pins as Hardware-controlled (AFSEL register) + //Set the CLK , MOSI(TX) and MISO(RX) pins as Hardware-controlled (Configures GPIO_AFSEL-->1) GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK ); GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX ); GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX ); @@ -101,7 +101,7 @@ void spi_init() { //According to the LoRaSX1276 datasheet, the corresponding mode is CPOL=0 , CPHA=0 which is FRF mode 0 SSIConfigSetExpClk(SSI1_BASE, SysCtrlIOClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, SysCtrlIOClockGet()/2/*16000000*/, 8); - // Enable the SSI1 module(writes into CR1) + //Enable the SSI1 module(writes into CR1) SSIEnable(SSI1_BASE); //Call the spi_txrx function From a4ee2756a50cf57e2b921d355fab14fc0d10ad15 Mon Sep 17 00:00:00 2001 From: youssef Date: Tue, 14 Apr 2020 17:59:19 +0200 Subject: [PATCH 08/51] New modified code with new comments --- projects/openmote-b/00std_spi/00std_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/openmote-b/00std_spi/00std_spi.c b/projects/openmote-b/00std_spi/00std_spi.c index d47d219b31..c8949069c7 100644 --- a/projects/openmote-b/00std_spi/00std_spi.c +++ b/projects/openmote-b/00std_spi/00std_spi.c @@ -97,7 +97,7 @@ void spi_init() { IOCPinConfigPeriphInput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX, IOC_SSIRXD_SSI1); - //Sets SSI_CR0 (SPI MODE), SSI_CR1(Protocol), SSI_CPSR(Clock prescaler divisor) + //Sets SSI_CR0 (SPI MODE and Data Size), SSI_CR1(Protocol), SSI_CPSR(Clock prescaler divisor) //According to the LoRaSX1276 datasheet, the corresponding mode is CPOL=0 , CPHA=0 which is FRF mode 0 SSIConfigSetExpClk(SSI1_BASE, SysCtrlIOClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, SysCtrlIOClockGet()/2/*16000000*/, 8); From 9b00664ff8694d65b94aa78536cfc4d24c9cdbdd Mon Sep 17 00:00:00 2001 From: youssef Date: Wed, 15 Apr 2020 17:20:16 +0200 Subject: [PATCH 09/51] Calling spi_txrx function --- projects/openmote-b/00std_spi/00std_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/projects/openmote-b/00std_spi/00std_spi.c b/projects/openmote-b/00std_spi/00std_spi.c index c8949069c7..06da5fa9f1 100644 --- a/projects/openmote-b/00std_spi/00std_spi.c +++ b/projects/openmote-b/00std_spi/00std_spi.c @@ -49,7 +49,7 @@ spi_vars_t spi_vars; //*********Variables to use as parameters of spi_txrx function****************// -/*static char stringToPrint[]="MessageToTest\r\n"; +static char stringToPrint[]="MessageToTest\r\n"; size_t len = strlen(stringToPrint);*/ //=========================== prototypes ====================================== @@ -105,7 +105,7 @@ void spi_init() { SSIEnable(SSI1_BASE); //Call the spi_txrx function - //spi_txrx(&stringToPrint,len,) + spi_txrx(&stringToPrint,len,SPI_FIRSTBYTE,16,16,SPI_FIRST,SPI_NOTLAST); } #ifdef SPI_IN_INTERRUPT_MODE From fb9e8f80a4cd5322f8aa439a593eaa8e8aa37d28 Mon Sep 17 00:00:00 2001 From: youssef Date: Wed, 15 Apr 2020 17:53:19 +0200 Subject: [PATCH 10/51] Modifying --- projects/openmote-b/00std_spi/00std_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/projects/openmote-b/00std_spi/00std_spi.c b/projects/openmote-b/00std_spi/00std_spi.c index 06da5fa9f1..f7d60d5728 100644 --- a/projects/openmote-b/00std_spi/00std_spi.c +++ b/projects/openmote-b/00std_spi/00std_spi.c @@ -50,7 +50,7 @@ spi_vars_t spi_vars; //*********Variables to use as parameters of spi_txrx function****************// static char stringToPrint[]="MessageToTest\r\n"; -size_t len = strlen(stringToPrint);*/ +size_t len = sizeof(stringToPrint); //=========================== prototypes ====================================== static void disableInterrupts(void); @@ -105,7 +105,7 @@ void spi_init() { SSIEnable(SSI1_BASE); //Call the spi_txrx function - spi_txrx(&stringToPrint,len,SPI_FIRSTBYTE,16,16,SPI_FIRST,SPI_NOTLAST); + spi_txrx((uint8_t*)stringToPrint,len,SPI_FIRSTBYTE,(uint8_t*)16,16,SPI_FIRST,SPI_NOTLAST); } #ifdef SPI_IN_INTERRUPT_MODE From d7eda8a42a4a3a2f34fe9bc36aa8e7b6bddbe967 Mon Sep 17 00:00:00 2001 From: youssef Date: Wed, 15 Apr 2020 17:54:20 +0200 Subject: [PATCH 11/51] Modifying spi_txrx function --- projects/openmote-b/00std_spi/00std_spi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/projects/openmote-b/00std_spi/00std_spi.c b/projects/openmote-b/00std_spi/00std_spi.c index f7d60d5728..a1cb4caec8 100644 --- a/projects/openmote-b/00std_spi/00std_spi.c +++ b/projects/openmote-b/00std_spi/00std_spi.c @@ -50,7 +50,7 @@ spi_vars_t spi_vars; //*********Variables to use as parameters of spi_txrx function****************// static char stringToPrint[]="MessageToTest\r\n"; -size_t len = sizeof(stringToPrint); +size_t len=sizeof(stringToPrint); //=========================== prototypes ====================================== static void disableInterrupts(void); From 2ff37d833124c92f8774ed397d5246bdb3d5b883 Mon Sep 17 00:00:00 2001 From: youssef Date: Thu, 16 Apr 2020 12:46:33 +0200 Subject: [PATCH 12/51] Changing location of the folder --- projects/common/00std_spi/00std_spi.c | 230 ++++++++++++++++++++++++++ 1 file changed, 230 insertions(+) create mode 100644 projects/common/00std_spi/00std_spi.c diff --git a/projects/common/00std_spi/00std_spi.c b/projects/common/00std_spi/00std_spi.c new file mode 100644 index 0000000000..a1cb4caec8 --- /dev/null +++ b/projects/common/00std_spi/00std_spi.c @@ -0,0 +1,230 @@ +/** +\brief definition of the "spi" bsp module. +\author Xavier Vilajosana , September 2017. +*/ +#include "board.h" +#include "board_info.h" +#include "ssi.h" +#include "spi.h" +#include "gpio.h" +#include "ioc.h" +#include "sys_ctrl.h" + +#include +#include +#include +#include +#include +#include + + +//=========================== defines ========================================= +#define SPI_PIN_SSI_CLK GPIO_PIN_0 // CLK +#define SPI_PIN_SSI_FSS GPIO_PIN_1 // CSn +#define SPI_PIN_SSI_RX GPIO_PIN_2 // MISO +#define SPI_PIN_SSI_TX GPIO_PIN_3 // MOSI +#define SPI_GPIO_SSI_BASE GPIO_B_BASE + +//=========================== variables ======================================= + +typedef struct { + // information about the current transaction + uint8_t* pNextTxByte; + uint16_t numTxedBytes; + uint16_t txBytesLeft; + spi_return_t returnType; + uint8_t* pNextRxByte; + uint16_t maxRxBytes; + spi_first_t isFirst; + spi_last_t isLast; + // state of the module + uint8_t busy; +#ifdef SPI_IN_INTERRUPT_MODE + // callback when module done + spi_cbt callback; +#endif +} spi_vars_t; + +spi_vars_t spi_vars; + +//*********Variables to use as parameters of spi_txrx function****************// + +static char stringToPrint[]="MessageToTest\r\n"; +size_t len=sizeof(stringToPrint); + +//=========================== prototypes ====================================== +static void disableInterrupts(void); +static void enableInterrupts(void); +//=========================== public ========================================== + +void spi_init() { + // clear variables + memset(&spi_vars,0,sizeof(spi_vars_t)); + + //Set the CLK , MOSI(TX) and MISO(RX) pins as Hardware-controlled (Configures GPIO_AFSEL-->1) + GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK ); + GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX ); + GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX ); + + //Set the SS pin as Software-controlled outputs (configures GPIO_AFSEL-->0 (software) and GPIO_DIR-->1 (Output) ) + //Only FSS can be used as SOFTWARE controlled OUTPUT + GPIOPinTypeGPIOOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS); + + //Set SS to High (writes into GPIO_DATA register) + GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, SPI_PIN_SSI_FSS); + + /*//Set pins to low + GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX, 0); + GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK, 0);*/ + + //Configuration of SSI1 peripheral + SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_SSI1); + SysCtrlPeripheralSleepEnable(SYS_CTRL_PERIPH_SSI1); + SysCtrlPeripheralDeepSleepDisable(SYS_CTRL_PERIPH_SSI1); + + //Disabling SSI (writes into SSI_CR1 --> 0) + SSIDisable(SSI1_BASE); + + //Set clock source (The baud clock source for the SSI to select.) + SSIClockSourceSet(SSI1_BASE, SSI_CLOCK_PIOSC); //The precision internal oscillator + + /*Configure output signal to IOC_Pxx_SEL register + Each signal is identified with its address table 9.1 in T.I datasheet*/ + IOCPinConfigPeriphOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK, IOC_MUX_OUT_SEL_SSI1_CLKOUT); + IOCPinConfigPeriphOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX, IOC_MUX_OUT_SEL_SSI1_TXD); + IOCPinConfigPeriphOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, IOC_MUX_OUT_SEL_SSI1_FSSOUT); + //Configures hardware peripheral input selection (i.e. IOC_SSIRXD_SSI1) + IOCPinConfigPeriphInput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX, IOC_SSIRXD_SSI1); + + + //Sets SSI_CR0 (SPI MODE and Data Size), SSI_CR1(Protocol), SSI_CPSR(Clock prescaler divisor) + //According to the LoRaSX1276 datasheet, the corresponding mode is CPOL=0 , CPHA=0 which is FRF mode 0 + SSIConfigSetExpClk(SSI1_BASE, SysCtrlIOClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, SysCtrlIOClockGet()/2/*16000000*/, 8); + + //Enable the SSI1 module(writes into CR1) + SSIEnable(SSI1_BASE); + + //Call the spi_txrx function + spi_txrx((uint8_t*)stringToPrint,len,SPI_FIRSTBYTE,(uint8_t*)16,16,SPI_FIRST,SPI_NOTLAST); +} + +#ifdef SPI_IN_INTERRUPT_MODE +void spi_setCb(spi_cbt cb) { + spi_vars.spi_cb = cb; +} +#endif + +void spi_txrx(uint8_t* bufTx, + uint16_t lenbufTx, + spi_return_t returnType, + uint8_t* bufRx, + uint16_t maxLenBufRx, + spi_first_t isFirst, + spi_last_t isLast) { + + uint32_t data,i; + GPIOPinWrite(GPIO_C_BASE, GPIO_PIN_3, GPIO_PIN_3); + // register spi frame to send + spi_vars.pNextTxByte = bufTx; + spi_vars.numTxedBytes = 0; + spi_vars.txBytesLeft = lenbufTx; + spi_vars.returnType = returnType; + spi_vars.pNextRxByte = bufRx; + spi_vars.maxRxBytes = maxLenBufRx; + spi_vars.isFirst = isFirst; + spi_vars.isLast = isLast; + + // SPI is now busy + spi_vars.busy = 1; + + // lower CS signal to have slave listening (FSS is managed through software, not hardware) + if (spi_vars.isFirst==SPI_FIRST) { + GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, 0); + } + + for ( i = 0; i < lenbufTx; i++) + { + // Push a byte + SSIDataPut(SSI1_BASE, spi_vars.pNextTxByte[i]); + + // Wait until it is complete + while(SSIBusy(SSI1_BASE)); + + // Read a byte + SSIDataGet(SSI1_BASE, &data); + + // Store the result + spi_vars.pNextRxByte[i] = (uint8_t)(data & 0xFF); + // one byte less to go + } + + if (spi_vars.isLast==SPI_LAST) { + GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, SPI_PIN_SSI_FSS); + } + + // SPI is not busy anymore + spi_vars.busy = 0; + GPIOPinWrite(GPIO_C_BASE, GPIO_PIN_3, 0); +} + +//=========================== private ========================================= + +port_INLINE void enableInterrupts(void) +{ + // Enable the SPI interrupt + SSIIntEnable(SSI1_BASE, (SSI_TXFF | SSI_RXFF | SSI_RXTO | SSI_RXOR)); + + // Enable the SPI interrupt + IntEnable(INT_SSI1); +} + +port_INLINE void disableInterrupts(void) +{ + // Disable the SPI interrupt + SSIIntDisable(SSI1_BASE, (SSI_TXFF | SSI_RXFF | SSI_RXTO | SSI_RXOR)); + + // Disable the SPI interrupt + IntDisable(INT_SSI1); +} + +//=========================== interrupt handlers ============================== + +kick_scheduler_t spi_isr() { +#ifdef SPI_IN_INTERRUPT_MODE + uint32_t data; + // save the byte just received in the RX buffer + status = SSIIntStatus(SSI1_BASE, true); + + // Clear SPI interrupt in the NVIC + IntPendClear(INT_SSI1); + + SSIDataGet(SSI1_BASE, &data); + + // Store the result + spi_vars.pNextRxByte = (uint8_t)(data & 0xFF); + + // one byte less to go + spi_vars.pNextTxByte++; + spi_vars.pNextRxByte++; + spi_vars.txBytesLeft--; + + if (spi_vars.txBytesLeft>0) { + // write next byte to TX buffer + SSIDataPut(SSI1_BASE, *spi_vars.pNextTxByte); + + } else { + // SPI is not busy anymore + spi_vars.busy = 0; + + // SPI is done! + if (spi_vars.callback!=NULL) { + // call the callback + spi_vars.spi_cb(); + // kick the OS + return KICK_SCHEDULER; + } + } + +#endif + return DO_NOT_KICK_SCHEDULER; +} From 2b09bc60ed3d5da5964ef08d4c67873a4b5144d4 Mon Sep 17 00:00:00 2001 From: youssef Date: Tue, 21 Apr 2020 17:58:13 +0200 Subject: [PATCH 13/51] Including the IAR project --- projects/openmote-b/00std_spi/00std_spi.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/projects/openmote-b/00std_spi/00std_spi.c b/projects/openmote-b/00std_spi/00std_spi.c index a1cb4caec8..6867df4f20 100644 --- a/projects/openmote-b/00std_spi/00std_spi.c +++ b/projects/openmote-b/00std_spi/00std_spi.c @@ -57,7 +57,7 @@ static void disableInterrupts(void); static void enableInterrupts(void); //=========================== public ========================================== -void spi_init() { +void spi_init(){ // clear variables memset(&spi_vars,0,sizeof(spi_vars_t)); @@ -105,7 +105,7 @@ void spi_init() { SSIEnable(SSI1_BASE); //Call the spi_txrx function - spi_txrx((uint8_t*)stringToPrint,len,SPI_FIRSTBYTE,(uint8_t*)16,16,SPI_FIRST,SPI_NOTLAST); + spi_txrx((uint8_t*)stringToPrint,len,SPI_FIRSTBYTE,(uint8_t*)16,16,SPI_FIRST,SPI_NOTLAST); } #ifdef SPI_IN_INTERRUPT_MODE From 4f499b69577c17d102e0d1bc2929024356ce645f Mon Sep 17 00:00:00 2001 From: youssef Date: Tue, 21 Apr 2020 17:58:47 +0200 Subject: [PATCH 14/51] Including IAR files --- projects/openmote-b/00std_spi/00std_spi.ewd | 2974 +++++++++++++++++ projects/openmote-b/00std_spi/00std_spi.ewp | 2548 +++++++++++++++ projects/openmote-b/00std_spi/00std_spi.ewt | 3178 +++++++++++++++++++ 3 files changed, 8700 insertions(+) create mode 100644 projects/openmote-b/00std_spi/00std_spi.ewd create mode 100644 projects/openmote-b/00std_spi/00std_spi.ewp create mode 100644 projects/openmote-b/00std_spi/00std_spi.ewt diff --git a/projects/openmote-b/00std_spi/00std_spi.ewd b/projects/openmote-b/00std_spi/00std_spi.ewd new file mode 100644 index 0000000000..85ad651910 --- /dev/null +++ b/projects/openmote-b/00std_spi/00std_spi.ewd @@ -0,0 +1,2974 @@ + + + 3 + + Debug + + ARM + + 1 + + C-SPY + 2 + + 32 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ARMSIM_ID + 2 + + 1 + 1 + 1 + + + + + + + + CADI_ID + 2 + + 0 + 1 + 1 + + + + + + + + + CMSISDAP_ID + 2 + + 4 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GDBSERVER_ID + 2 + + 0 + 1 + 1 + + + + + + + + + + + IJET_ID + 2 + + 8 + 1 + 1 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + JLINK_ID + 2 + + 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$PROJ_DIR$\..\..\..\bsp\boards\openmote-b\headers\hw_smwdthrosc.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\headers\hw_soc_adc.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\headers\hw_ssi.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\headers\hw_sys_ctrl.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\headers\hw_types.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\headers\hw_uart.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\headers\hw_udma.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\headers\hw_udmachctl.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\headers\hw_usb.h + + + + source + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\adc.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\adc.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\aes.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\aes.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\bl_commands.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\ccm.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\ccm.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\cpu.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\cpu.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\debug.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\debug.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\ecc_curveinfo.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\flash.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\flash.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\gpio.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\gpio.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\gptimer.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\gptimer.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\i2c_lib.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\i2c_lib.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\interrupt.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\interrupt.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\ioc.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\ioc.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\pka.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\pka.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\rom.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\sha256.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\sha256.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\sleepmode.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\sleepmode.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\ssi.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\ssi.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\sys_ctrl.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\sys_ctrl.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\systick.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\systick.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\uarthal.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\uarthal.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\udma.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\udma.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\watchdog.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\watchdog.h + + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\adc_sensor.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\adc_sensor.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\board.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\board_info.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\bsp_timer.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\cc2538rf.h + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\cryptoengine.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\debugpins.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\eui64.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\i2c.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\leds.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\radio.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\radiotimer.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\sctimer.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\sensors.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\startup_iar.c + + + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\uart.c + + + + $PROJ_DIR$\..\..\..\bsp\boards\board.h + + + $PROJ_DIR$\..\..\..\bsp\boards\bsp_timer.h + + + $PROJ_DIR$\..\..\..\bsp\boards\crypto_engine.h + + + $PROJ_DIR$\..\..\..\bsp\boards\debugpins.h + + + $PROJ_DIR$\..\..\..\bsp\boards\eui64.h + + + $PROJ_DIR$\..\..\..\bsp\boards\i2c.h + + + $PROJ_DIR$\..\..\..\bsp\boards\leds.h + + + $PROJ_DIR$\..\..\..\bsp\boards\radio.h + + + $PROJ_DIR$\..\..\..\bsp\boards\radiotimer.h + + + $PROJ_DIR$\..\..\..\bsp\boards\sctimer.h + + + $PROJ_DIR$\..\..\..\bsp\boards\sensors.h + + + $PROJ_DIR$\..\..\..\bsp\boards\spi.h + + + $PROJ_DIR$\..\..\..\bsp\boards\toolchain_defs.h + + + $PROJ_DIR$\..\..\..\bsp\boards\uart.h + + + + chips + + adxl346 + + $PROJ_DIR$\..\..\..\bsp\chips\adxl346\adxl346.c + + + $PROJ_DIR$\..\..\..\bsp\chips\adxl346\adxl346.h + + + + max44009 + + $PROJ_DIR$\..\..\..\bsp\chips\max44009\max44009.c + + + $PROJ_DIR$\..\..\..\bsp\chips\max44009\max44009.h + + + + sht21 + + $PROJ_DIR$\..\..\..\bsp\chips\sht21\sht21.c + + + $PROJ_DIR$\..\..\..\bsp\chips\sht21\sht21.h + + + + si70x + + $PROJ_DIR$\..\..\..\bsp\chips\si70x\si70x.c + + + $PROJ_DIR$\..\..\..\bsp\chips\si70x\si70x.h + + + + + + drivers + + common + + $PROJ_DIR$\..\..\..\drivers\common\openhdlc.c + + + $PROJ_DIR$\..\..\..\drivers\common\openhdlc.h + + + $PROJ_DIR$\..\..\..\drivers\common\opensensors.c + + + $PROJ_DIR$\..\..\..\drivers\common\opensensors.h + + + $PROJ_DIR$\..\..\..\drivers\common\openserial.c + + + $PROJ_DIR$\..\..\..\drivers\common\openserial.h + + + $PROJ_DIR$\..\..\..\drivers\common\opentimers.c + + + $PROJ_DIR$\..\..\..\drivers\common\opentimers.h + + + + + inc + + $PROJ_DIR$\..\..\..\inc\opendefs.h + + + + projects + + common + + + + $PROJ_DIR$\00std_spi.c + + + $PROJ_DIR$\..\..\..\kernel\openos\scheduler.c + + + $PROJ_DIR$\..\..\..\kernel\scheduler.h + + From c845bd28351cfa1d2094a459e5fb5908f969be05 Mon Sep 17 00:00:00 2001 From: youssef Date: Tue, 21 Apr 2020 18:04:03 +0200 Subject: [PATCH 15/51] modification new commit --- bsp/boards/openmote-b/board.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bsp/boards/openmote-b/board.c b/bsp/boards/openmote-b/board.c index df5dbadd63..4cfc6de0f5 100644 --- a/bsp/boards/openmote-b/board.c +++ b/bsp/boards/openmote-b/board.c @@ -83,7 +83,7 @@ void board_init(void) { uart_init(); radio_init(); i2c_init(); - sensors_init(); + //sensors_init(); cryptoengine_init(); } From 5a153b04adfa59732da2796291a11c1437d176a5 Mon Sep 17 00:00:00 2001 From: youssef Date: Tue, 21 Apr 2020 18:04:31 +0200 Subject: [PATCH 16/51] new commit --- bsp/boards/openmote-b/sensors.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/bsp/boards/openmote-b/sensors.c b/bsp/boards/openmote-b/sensors.c index 10562d7283..711f81abc7 100644 --- a/bsp/boards/openmote-b/sensors.c +++ b/bsp/boards/openmote-b/sensors.c @@ -8,7 +8,7 @@ #include "board.h" #include "sensors.h" -#include "si70x.h" +//#include "si70x.h" //=========================== defines ========================================= @@ -25,7 +25,7 @@ sensors_vars_t sensors_vars; /** \brief Initialize sensors on the board */ -void sensors_init(void) { +/*void sensors_init(void) { memset(&sensors_vars,0,sizeof(sensors_vars_t)); @@ -38,23 +38,23 @@ void sensors_init(void) { adc_sensor_init(); sensors_vars.sensorsTypes[SENSOR_ADCTEMPERATURE] = 1; -} +}*/ /** \brief Returns a bool value indicating if a given sensor is present \param[in] sensorType sensor type polled. \param[out] returnVal presence of the sensor. */ -bool sensors_is_present(uint8_t sensorType) { +/*bool sensors_is_present(uint8_t sensorType) { return sensors_vars.sensorsTypes[sensorType]; -} +}*/ /** \brief Returns the callback for reading data from a given sensor \param[in] sensorType sensor type used to associate the callback. \param[out] callback for reading data. */ -callbackRead_cbt sensors_getCallbackRead(uint8_t sensorType) { +/*callbackRead_cbt sensors_getCallbackRead(uint8_t sensorType) { switch (sensorType) { case SENSOR_TEMPERATURE: @@ -67,14 +67,14 @@ callbackRead_cbt sensors_getCallbackRead(uint8_t sensorType) { return NULL; } -} +}*/ /** \brief Returns the callback for converting data from a given sensor \param[in] sensorType sensor type used to associate the callback. \param[out] callback for converting data. */ -callbackConvert_cbt sensors_getCallbackConvert(uint8_t sensorType) { +/*callbackConvert_cbt sensors_getCallbackConvert(uint8_t sensorType) { switch (sensorType) { case SENSOR_TEMPERATURE: @@ -87,6 +87,6 @@ callbackConvert_cbt sensors_getCallbackConvert(uint8_t sensorType) { return NULL; } -} +}*/ //=========================== private ========================================= From 36bbcaf3b8a24ef3b26bd4f1b59d5152aad13416 Mon Sep 17 00:00:00 2001 From: youssef Date: Tue, 21 Apr 2020 18:05:23 +0200 Subject: [PATCH 17/51] new commit --- projects/common/00std_spi/00std_spi.c | 230 -------------------------- 1 file changed, 230 deletions(-) delete mode 100644 projects/common/00std_spi/00std_spi.c diff --git a/projects/common/00std_spi/00std_spi.c b/projects/common/00std_spi/00std_spi.c deleted file mode 100644 index a1cb4caec8..0000000000 --- a/projects/common/00std_spi/00std_spi.c +++ /dev/null @@ -1,230 +0,0 @@ -/** -\brief definition of the "spi" bsp module. -\author Xavier Vilajosana , September 2017. -*/ -#include "board.h" -#include "board_info.h" -#include "ssi.h" -#include "spi.h" -#include "gpio.h" -#include "ioc.h" -#include "sys_ctrl.h" - -#include -#include -#include -#include -#include -#include - - -//=========================== defines ========================================= -#define SPI_PIN_SSI_CLK GPIO_PIN_0 // CLK -#define SPI_PIN_SSI_FSS GPIO_PIN_1 // CSn -#define SPI_PIN_SSI_RX GPIO_PIN_2 // MISO -#define SPI_PIN_SSI_TX GPIO_PIN_3 // MOSI -#define SPI_GPIO_SSI_BASE GPIO_B_BASE - -//=========================== variables ======================================= - -typedef struct { - // information about the current transaction - uint8_t* pNextTxByte; - uint16_t numTxedBytes; - uint16_t txBytesLeft; - spi_return_t returnType; - uint8_t* pNextRxByte; - uint16_t maxRxBytes; - spi_first_t isFirst; - spi_last_t isLast; - // state of the module - uint8_t busy; -#ifdef SPI_IN_INTERRUPT_MODE - // callback when module done - spi_cbt callback; -#endif -} spi_vars_t; - -spi_vars_t spi_vars; - -//*********Variables to use as parameters of spi_txrx function****************// - -static char stringToPrint[]="MessageToTest\r\n"; -size_t len=sizeof(stringToPrint); - -//=========================== prototypes ====================================== -static void disableInterrupts(void); -static void enableInterrupts(void); -//=========================== public ========================================== - -void spi_init() { - // clear variables - memset(&spi_vars,0,sizeof(spi_vars_t)); - - //Set the CLK , MOSI(TX) and MISO(RX) pins as Hardware-controlled (Configures GPIO_AFSEL-->1) - GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK ); - GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX ); - GPIOPinTypeSSI(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX ); - - //Set the SS pin as Software-controlled outputs (configures GPIO_AFSEL-->0 (software) and GPIO_DIR-->1 (Output) ) - //Only FSS can be used as SOFTWARE controlled OUTPUT - GPIOPinTypeGPIOOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS); - - //Set SS to High (writes into GPIO_DATA register) - GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, SPI_PIN_SSI_FSS); - - /*//Set pins to low - GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX, 0); - GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK, 0);*/ - - //Configuration of SSI1 peripheral - SysCtrlPeripheralEnable(SYS_CTRL_PERIPH_SSI1); - SysCtrlPeripheralSleepEnable(SYS_CTRL_PERIPH_SSI1); - SysCtrlPeripheralDeepSleepDisable(SYS_CTRL_PERIPH_SSI1); - - //Disabling SSI (writes into SSI_CR1 --> 0) - SSIDisable(SSI1_BASE); - - //Set clock source (The baud clock source for the SSI to select.) - SSIClockSourceSet(SSI1_BASE, SSI_CLOCK_PIOSC); //The precision internal oscillator - - /*Configure output signal to IOC_Pxx_SEL register - Each signal is identified with its address table 9.1 in T.I datasheet*/ - IOCPinConfigPeriphOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_CLK, IOC_MUX_OUT_SEL_SSI1_CLKOUT); - IOCPinConfigPeriphOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_TX, IOC_MUX_OUT_SEL_SSI1_TXD); - IOCPinConfigPeriphOutput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, IOC_MUX_OUT_SEL_SSI1_FSSOUT); - //Configures hardware peripheral input selection (i.e. IOC_SSIRXD_SSI1) - IOCPinConfigPeriphInput(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_RX, IOC_SSIRXD_SSI1); - - - //Sets SSI_CR0 (SPI MODE and Data Size), SSI_CR1(Protocol), SSI_CPSR(Clock prescaler divisor) - //According to the LoRaSX1276 datasheet, the corresponding mode is CPOL=0 , CPHA=0 which is FRF mode 0 - SSIConfigSetExpClk(SSI1_BASE, SysCtrlIOClockGet(), SSI_FRF_MOTO_MODE_0, SSI_MODE_MASTER, SysCtrlIOClockGet()/2/*16000000*/, 8); - - //Enable the SSI1 module(writes into CR1) - SSIEnable(SSI1_BASE); - - //Call the spi_txrx function - spi_txrx((uint8_t*)stringToPrint,len,SPI_FIRSTBYTE,(uint8_t*)16,16,SPI_FIRST,SPI_NOTLAST); -} - -#ifdef SPI_IN_INTERRUPT_MODE -void spi_setCb(spi_cbt cb) { - spi_vars.spi_cb = cb; -} -#endif - -void spi_txrx(uint8_t* bufTx, - uint16_t lenbufTx, - spi_return_t returnType, - uint8_t* bufRx, - uint16_t maxLenBufRx, - spi_first_t isFirst, - spi_last_t isLast) { - - uint32_t data,i; - GPIOPinWrite(GPIO_C_BASE, GPIO_PIN_3, GPIO_PIN_3); - // register spi frame to send - spi_vars.pNextTxByte = bufTx; - spi_vars.numTxedBytes = 0; - spi_vars.txBytesLeft = lenbufTx; - spi_vars.returnType = returnType; - spi_vars.pNextRxByte = bufRx; - spi_vars.maxRxBytes = maxLenBufRx; - spi_vars.isFirst = isFirst; - spi_vars.isLast = isLast; - - // SPI is now busy - spi_vars.busy = 1; - - // lower CS signal to have slave listening (FSS is managed through software, not hardware) - if (spi_vars.isFirst==SPI_FIRST) { - GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, 0); - } - - for ( i = 0; i < lenbufTx; i++) - { - // Push a byte - SSIDataPut(SSI1_BASE, spi_vars.pNextTxByte[i]); - - // Wait until it is complete - while(SSIBusy(SSI1_BASE)); - - // Read a byte - SSIDataGet(SSI1_BASE, &data); - - // Store the result - spi_vars.pNextRxByte[i] = (uint8_t)(data & 0xFF); - // one byte less to go - } - - if (spi_vars.isLast==SPI_LAST) { - GPIOPinWrite(SPI_GPIO_SSI_BASE, SPI_PIN_SSI_FSS, SPI_PIN_SSI_FSS); - } - - // SPI is not busy anymore - spi_vars.busy = 0; - GPIOPinWrite(GPIO_C_BASE, GPIO_PIN_3, 0); -} - -//=========================== private ========================================= - -port_INLINE void enableInterrupts(void) -{ - // Enable the SPI interrupt - SSIIntEnable(SSI1_BASE, (SSI_TXFF | SSI_RXFF | SSI_RXTO | SSI_RXOR)); - - // Enable the SPI interrupt - IntEnable(INT_SSI1); -} - -port_INLINE void disableInterrupts(void) -{ - // Disable the SPI interrupt - SSIIntDisable(SSI1_BASE, (SSI_TXFF | SSI_RXFF | SSI_RXTO | SSI_RXOR)); - - // Disable the SPI interrupt - IntDisable(INT_SSI1); -} - -//=========================== interrupt handlers ============================== - -kick_scheduler_t spi_isr() { -#ifdef SPI_IN_INTERRUPT_MODE - uint32_t data; - // save the byte just received in the RX buffer - status = SSIIntStatus(SSI1_BASE, true); - - // Clear SPI interrupt in the NVIC - IntPendClear(INT_SSI1); - - SSIDataGet(SSI1_BASE, &data); - - // Store the result - spi_vars.pNextRxByte = (uint8_t)(data & 0xFF); - - // one byte less to go - spi_vars.pNextTxByte++; - spi_vars.pNextRxByte++; - spi_vars.txBytesLeft--; - - if (spi_vars.txBytesLeft>0) { - // write next byte to TX buffer - SSIDataPut(SSI1_BASE, *spi_vars.pNextTxByte); - - } else { - // SPI is not busy anymore - spi_vars.busy = 0; - - // SPI is done! - if (spi_vars.callback!=NULL) { - // call the callback - spi_vars.spi_cb(); - // kick the OS - return KICK_SCHEDULER; - } - } - -#endif - return DO_NOT_KICK_SCHEDULER; -} From e2ddc59dc13efe994d91bd934c11ff841fc0ecf6 Mon Sep 17 00:00:00 2001 From: youssef Date: Tue, 21 Apr 2020 18:05:53 +0200 Subject: [PATCH 18/51] IAR project update --- projects/openmote-b/openmote_b.eww | 73 ++++++++++++------------------ 1 file changed, 29 insertions(+), 44 deletions(-) diff --git a/projects/openmote-b/openmote_b.eww b/projects/openmote-b/openmote_b.eww index 62dc3f76a7..027b919038 100644 --- a/projects/openmote-b/openmote_b.eww +++ b/projects/openmote-b/openmote_b.eww @@ -1,46 +1,31 @@ - - + - - $WS_DIR$\01bsp_sctimer\01bsp_sctimer.ewp - - - $WS_DIR$\02drv_opentimers\02drv_opentimers.ewp - - - $WS_DIR$\03oos_macpong\03oos_macpong.ewp - - - $WS_DIR$\03oos_openwsn\03oos_openwsn.ewp - - - $WS_DIR$\03oos_sniffer\03oos_sniffer.ewp - - - - all_debug - - 01bsp_sctimer - Debug - - - 02drv_opentimers - Debug - - - 03oos_macpong - Debug - - - 03oos_openwsn - Debug - - - 03oos_sniffer - Debug - - - + + $WS_DIR$\00std_spi\00std_spi.ewp + + + + all_debug + + 01bsp_sctimer + Debug + + + 02drv_opentimers + Debug + + + 03oos_macpong + Debug + + + 03oos_openwsn + Debug + + + 03oos_sniffer + Debug + + + - - From 53dbbc1e7ce298ae88e4e3bc0c2ebfe69b17112d Mon Sep 17 00:00:00 2001 From: youssef Date: Tue, 28 Apr 2020 18:19:36 +0200 Subject: [PATCH 19/51] New commit to push the code --- projects/openmote-b/00std_spi/00std_spi.ewp | 12 +++++++++--- projects/openmote-b/00std_spi/00std_spi.ewt | 6 ++++++ 2 files changed, 15 insertions(+), 3 deletions(-) diff --git a/projects/openmote-b/00std_spi/00std_spi.ewp b/projects/openmote-b/00std_spi/00std_spi.ewp index d7510256cd..7263165019 100644 --- a/projects/openmote-b/00std_spi/00std_spi.ewp +++ b/projects/openmote-b/00std_spi/00std_spi.ewp @@ -352,10 +352,9 @@ $PROJ_DIR$ $PROJ_DIR$\..\..\..\bsp\ $PROJ_DIR$\..\..\..\bsp\boards\ - $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\ + $PROJ_DIR$\..\..\..\bsp\boards\common\ $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\headers\ $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\source\ - $PROJ_DIR$\..\..\..\bsp\boards\common\ $PROJ_DIR$\..\..\..\bsp\chips\adxl346\ $PROJ_DIR$\..\..\..\bsp\chips\max44009\ $PROJ_DIR$\..\..\..\bsp\chips\sht21\ @@ -364,6 +363,7 @@ $PROJ_DIR$\..\..\..\kernel\openos\ $PROJ_DIR$\..\..\..\drivers\common\ $PROJ_DIR$\..\..\..\inc\ + $PROJ_DIR$\..\..\..\bsp\boards\openmote-b\