[BACKEND] Update LLVM version to llvm/llvm-project@b864909

Includes fixes for the following LLVM changes:

* llvm/llvm-project@bbe3d64
* llvm/llvm-project@2929a29
* llvm/llvm-project@48babe1

Author: olegshyshkov

cmake/llvm-hash.txt

@@ -1 +1 @@
-0a83e96f6616c79a2ac63588a550ed420798791f
+b8649098a7fcf598406d8d8b7d68891d1444e9c8

test/Conversion/tritongpu_to_llvm.mlir

@@ -1,4 +1,7 @@
-// RUN: triton-opt %s -split-input-file --allocate-shared-memory-nv --convert-triton-gpu-to-llvm 2>/dev/null | FileCheck %s --dump-input-context 20
+// RUN: triton-opt %s -split-input-file \
+// RUN:   --allocate-shared-memory-nv --convert-triton-gpu-to-llvm \
+// RUN:   --reconcile-unrealized-casts 2>/dev/null \
+// RUN:   | FileCheck %s --dump-input-context 20
 
 module attributes {"ttg.num-ctas" = 1 : i32, "ttg.num-warps" = 4 : i32} {
   // CHECK: llvm.func @test_empty_kernel(%arg0: i32, %arg1: !llvm.ptr<1>, %arg2: !llvm.ptr<1>, %arg3: !llvm.ptr<1>)

test/Conversion/tritonnvidiagpu_to_llvm.mlir

@@ -1,4 +1,7 @@
-// RUN: triton-opt %s -split-input-file --convert-triton-gpu-to-llvm=compute-capability=90 | FileCheck %s
+// RUN: triton-opt %s -split-input-file \
+// RUN: --convert-triton-gpu-to-llvm=compute-capability=90 \
+// RUN: --reconcile-unrealized-casts \
+// RUN: | FileCheck %s
 
 #shared0 = #ttg.swizzled_shared<{vec = 1, perPhase = 1, maxPhase = 1, order = [0], CTAsPerCGA = [1], CTASplitNum = [1], CTAOrder = [0]}>
 #smem = #ttg.shared_memory

third_party/amd/lib/TritonAMDGPUToLLVM/AtomicRMWOpsEmitter.cpp

@@ -405,15 +405,28 @@ Value AtomicRMWEmitter::atomicIntraWaveReduce(RewriterBase &rewriter,
   Value done = b.icmp_eq(chosen, rmwPtr);
   Value mask = targetInfo.ballot(rewriter, loc, i64_ty, done);
   Value start = loopBody->getArgument(0);
+  NamedAttribute noundef = rewriter.getNamedAttr(
+      LLVM::LLVMDialect::getNoUndefAttrName(), rewriter.getUnitAttr());
+  NamedAttribute lowRange = rewriter.getNamedAttr(
+      LLVM::LLVMDialect::getRangeAttrName(),
+      LLVM::ConstantRangeAttr::get(rewriter.getContext(), APInt::getZero(32),
+                                   APInt(32, 32)));
+  NamedAttribute highRange = rewriter.getNamedAttr(
+      LLVM::LLVMDialect::getRangeAttrName(),
+      LLVM::ConstantRangeAttr::get(rewriter.getContext(), APInt::getZero(32),
+                                   APInt(32, 64)));
   Value cnt = b.trunc(i32_ty, generatePopcount64(rewriter, mask));
   Value maskLo = b.trunc(i32_ty, mask);
-  Value mbcntLoRes =
-      ROCDL::MbcntLoOp::create(rewriter, loc, i32_ty, maskLo, b.i32_val(0),
-                               /*arg_attrs=*/{}, /*res_attrs=*/{});
+  Value mbcntLoRes = ROCDL::MbcntLoOp::create(
+      rewriter, loc, i32_ty, maskLo, b.i32_val(0),
+      /*arg_attrs=*/{}, /*res_attrs=*/
+      rewriter.getArrayAttr(rewriter.getDictionaryAttr({noundef, lowRange})));
   Value maskHi = b.trunc(i32_ty, b.lshr(mask, b.i64_val(32)));
-  Value idx =
-      ROCDL::MbcntHiOp::create(rewriter, loc, i32_ty, maskHi, mbcntLoRes,
-                               /*arg_attrs=*/{}, /*res_attrs=*/{});
+  Value idx = ROCDL::MbcntHiOp::create(
+      rewriter, loc, i32_ty, maskHi, mbcntLoRes,
+      /*arg_attrs=*/{},
+      /*res_attrs=*/
+      rewriter.getArrayAttr(rewriter.getDictionaryAttr({noundef, highRange})));
   Value base = b.add(start, cnt);
   Value leader = b.icmp_eq(idx, b.i32_val(0));
   cnt = b.sub(cnt, idx);

third_party/amd/lib/TritonAMDGPUToLLVM/TritonGPUToLLVM.cpp

@@ -256,7 +256,7 @@ struct ConvertTritonAMDGPUToLLVM
         loc, arrayTy, /*isConstant=*/false, LLVM::Linkage::External,
         "global_smem", /*value=*/Attribute(), /*alignment=*/16,
         // Add ROCm support.
-        static_cast<unsigned>(NVVM::NVVMMemorySpace::kSharedMemorySpace));
+        static_cast<unsigned>(NVVM::NVVMMemorySpace::Shared));
   }
 };
 

third_party/amd/lib/TritonAMDGPUTransforms/CanonicalizePointers.cpp

@@ -1764,7 +1764,7 @@ class ConvertUnimplementedOpUnrealizedCasts
     if (auto integerAttr =
             llvm::dyn_cast_or_null<mlir::IntegerAttr>(maybeAttr)) {
       if (integerAttr.getValue() == 0) {
-        rewriter.replaceAllUsesWith(castOp.getResult(0), fatPtrBase);
+        rewriter.RewriterBase::replaceAllUsesWith(castOp.getResult(0), fatPtrBase);
         rewriter.eraseOp(castOp);
         return success();
       }
@@ -1774,7 +1774,7 @@ class ConvertUnimplementedOpUnrealizedCasts
         fatPtrs.at({fatPtrBase, fatPtrOffset});
     auto newPtr = createTensorPointer(rewriter, fatPtrBase, fatPtrOffset,
                                       castOp.getLoc(), fatPtrAttrs);
-    rewriter.replaceAllUsesWith(newPtr, fatPtrBase);
+    rewriter.RewriterBase::replaceAllUsesWith(newPtr, fatPtrBase);
     rewriter.eraseOp(castOp);
     return success();
   }

third_party/amd/lib/TritonAMDGPUTransforms/Utility.cpp

@@ -24,9 +24,9 @@ int deduceMinCountBetweeOps(Operation *beginOp, Operation *endOp,
           deduceMinCountInBlock(ifOp.getElseRegion().front(), countFunc);
       count += std::min(minThen, minElse);
     } else if (auto forOp = llvm::dyn_cast<scf::ForOp>(op)) {
-      auto tripCount = constantTripCount(forOp.getLowerBound(),
-                                         forOp.getUpperBound(), forOp.getStep())
-                           .value_or(0);
+      int64_t tripCount = forOp.getStaticTripCount()
+                              .value_or(llvm::APInt(64, 0))
+                              .getZExtValue();
       if (tripCount > 0) {
         count += tripCount * deduceMinCountInBlock(*forOp.getBody(), countFunc);
       }

third_party/nvidia/lib/TritonNVIDIAGPUToLLVM/TritonGPUToLLVM.cpp

@@ -220,7 +220,7 @@ struct ConvertTritonGPUToLLVM
         loc, arrayTy, /*isConstant=*/false, LLVM::Linkage::External,
         "global_smem", /*value=*/Attribute(), /*alignment=*/16,
         // Add ROCm support.
-        static_cast<unsigned>(NVVM::NVVMMemorySpace::kSharedMemorySpace));
+        static_cast<unsigned>(NVVM::NVVMMemorySpace::Shared));
   }
 };