鲁班猫4 RK3588S2 无法识别 GPU 及 NPU

[Aniline47]

设备信息

项目	信息
SOC	RK3588S2
Model	鲁班猫4
Kernel	6.18.18
启动介质	SD
系统版本	1.1.3106

---

问题描述

鲁班猫4在该系统版本下无法识别 GPU 及 NPU，相关硬件加速功能不可用。

经反编译提供的DTB源码，发现 GPU 与 三核 NPU/IOMMU 均被禁用：

---

gpu@fb000000 {
		compatible = "rockchip,rk3588-mali", "arm,mali-valhall-csf";
		reg = <0x00 0xfb000000 0x00 0x200000>;
		#cooling-cells = <0x02>;
		assigned-clocks = <0x0a 0x05>;
		assigned-clock-rates = <0xbebc200>;
		clocks = <0x21 0x106 0x21 0x107 0x21 0x108>;
		clock-names = "core", "coregroup", "stacks";
		dynamic-power-coefficient = <0xba6>;
		interrupts = <0x00 0x5c 0x04 0x00 0x00 0x5d 0x04 0x00 0x00 0x5e 0x04 0x00>;
		interrupt-names = "job", "mmu", "gpu";
		power-domains = <0x22 0x0c>;
		status = "disabled";
		operating-points-v2 = <0x23>;
		phandle = <0xec>;
	};

npu@fdab0000 {
		compatible = "rockchip,rk3588-rknn-core";
		reg = <0x00 0xfdab0000 0x00 0x1000 0x00 0xfdab1000 0x00 0x1000 0x00 0xfdab3000 0x00 0x1000>;
		reg-names = "pc", "cna", "core";
		interrupts = <0x00 0x6e 0x04 0x00>;
		clocks = <0x21 0x11f 0x21 0x120 0x0a 0x06 0x21 0x123>;
		clock-names = "aclk", "hclk", "npu", "pclk";
		assigned-clocks = <0x0a 0x06>;
		assigned-clock-rates = <0xbebc200>;
		resets = <0x21 0x110 0x21 0x112>;
		reset-names = "srst_a", "srst_h";
		power-domains = <0x22 0x09>;
		iommus = <0x68>;
		status = "disabled";
		phandle = <0x131>;
	};

	iommu@fdab9000 {
		compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
		reg = <0x00 0xfdab9000 0x00 0x100 0x00 0xfdaba000 0x00 0x100>;
		interrupts = <0x00 0x6e 0x04 0x00>;
		clocks = <0x21 0x11f 0x21 0x120>;
		clock-names = "aclk", "iface";
		#iommu-cells = <0x00>;
		power-domains = <0x22 0x09>;
		status = "disabled";
		phandle = <0x68>;
	};

	npu@fdac0000 {
		compatible = "rockchip,rk3588-rknn-core";
		reg = <0x00 0xfdac0000 0x00 0x1000 0x00 0xfdac1000 0x00 0x1000 0x00 0xfdac3000 0x00 0x1000>;
		reg-names = "pc", "cna", "core";
		interrupts = <0x00 0x6f 0x04 0x00>;
		clocks = <0x21 0x114 0x21 0x115 0x0a 0x06 0x21 0x123>;
		clock-names = "aclk", "hclk", "npu", "pclk";
		assigned-clocks = <0x0a 0x06>;
		assigned-clock-rates = <0xbebc200>;
		resets = <0x21 0xfa 0x21 0xfc>;
		reset-names = "srst_a", "srst_h";
		power-domains = <0x22 0x0a>;
		iommus = <0x69>;
		status = "disabled";
		phandle = <0x132>;
	};

	iommu@fdaca000 {
		compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
		reg = <0x00 0xfdaca000 0x00 0x100>;
		interrupts = <0x00 0x6f 0x04 0x00>;
		clocks = <0x21 0x114 0x21 0x115>;
		clock-names = "aclk", "iface";
		#iommu-cells = <0x00>;
		power-domains = <0x22 0x0a>;
		status = "disabled";
		phandle = <0x69>;
	};

	npu@fdad0000 {
		compatible = "rockchip,rk3588-rknn-core";
		reg = <0x00 0xfdad0000 0x00 0x1000 0x00 0xfdad1000 0x00 0x1000 0x00 0xfdad3000 0x00 0x1000>;
		reg-names = "pc", "cna", "core";
		interrupts = <0x00 0x70 0x04 0x00>;
		clocks = <0x21 0x116 0x21 0x117 0x0a 0x06 0x21 0x123>;
		clock-names = "aclk", "hclk", "npu", "pclk";
		assigned-clocks = <0x0a 0x06>;
		assigned-clock-rates = <0xbebc200>;
		resets = <0x21 0xfe 0x21 0x100>;
		reset-names = "srst_a", "srst_h";
		power-domains = <0x22 0x0b>;
		iommus = <0x6a>;
		status = "disabled";
		phandle = <0x133>;
	};

	iommu@fdada000 {
		compatible = "rockchip,rk3588-iommu", "rockchip,rk3568-iommu";
		reg = <0x00 0xfdada000 0x00 0x100>;
		interrupts = <0x00 0x70 0x04 0x00>;
		clocks = <0x21 0x116 0x21 0x117>;
		clock-names = "aclk", "iface";
		#iommu-cells = <0x00>;
		power-domains = <0x22 0x0b>;
		status = "disabled";
		phandle = <0x6a>;
	};