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    14 repositories

    • pulp_soc

      Public
      pulp_soc is the core building component of PULP based SoCs
      SystemVerilog
      •
      Other
      •81•0•0•0•Updated Feb 8, 2023Feb 8, 2023

    • VexRiscv

      Public
      A FPGA friendly 32 bit RISC-V CPU implementation
      Assembly
      •
      MIT License
      •423•0•0•0•Updated Dec 20, 2022Dec 20, 2022

    • zipcpu

      Public
      A small, light weight, RISC CPU soft core
      Verilog
      •156•0•0•0•Updated Dec 20, 2022Dec 20, 2022

    • epsilon

      Public
      Modern graphing calculator operating system.
      C++
      •464•0•0•0•Updated Aug 23, 2022Aug 23, 2022

    • uECG

      Public
      uECG device firmware - other parts of the project linked in description
      C
      •
      MIT License
      •10•0•0•0•Updated Jul 20, 2022Jul 20, 2022

    • Prince-of-Persia-Apple-II

      Public
      A running-jumping-swordfighting game I made on the Apple II from 1985-89
      Assembly
      •
      Other
      •685•0•0•0•Updated Apr 19, 2022Apr 19, 2022

    • tinyusb

      Public
      An open source cross-platform USB stack for embedded system
      C
      •
      MIT License
      •1.1k•0•0•0•Updated Mar 23, 2022Mar 23, 2022

    • tinyuf2

      Public
      UF2 bootloader based on TinyUSB for embedded devices such as ESP32S2, STM32F4 and iMX RT10xx
      C
      •
      MIT License
      •183•0•0•0•Updated Mar 22, 2022Mar 22, 2022

    • mooltipass

      Public
      Github repository dedicated to the mooltipass project
      C
      •113•0•0•0•Updated Apr 26, 2021Apr 26, 2021

    • AVR-AES-faster

      Public
      Fast AES library for 8-bit AVR processors
      Assembly
      •
      Mozilla Public License 2.0
      •2•0•0•0•Updated Dec 18, 2020Dec 18, 2020

    • lowrisc-chip

      Public
      The root repo for lowRISC project and FPGA demos.
      SystemVerilog
      •
      Other
      •148•0•0•0•Updated Mar 2, 2020Mar 2, 2020

    • 8085-fpga

      Public
      i8080 precise replica in Verilog, based on reverse engineering of real die
      Verilog
      •
      Other
      •22•0•0•0•Updated Jul 13, 2019Jul 13, 2019

    • memtype

      Public
      Memtype -- Open Hardware Password & Data Manager
      C
      •
      Other
      •18•0•0•0•Updated Apr 24, 2018Apr 24, 2018

    • mriscv

      Public
      A 32-bit Microcontroller featuring a RISC-V core
      Verilog
      •
      Other
      •38•0•0•0•Updated Feb 28, 2018Feb 28, 2018