peakRDL regblock : Support of burst transactions on Avalon-MM

[martin-tanguay]

Hi,

I'm using the Avalon-MM interface for regblock generation, and I'd like to know if there are any plans to support burst transactions (burstcount input) ?

Thanks !

Martin

[martin-tanguay]

@amykyta3 Any idea ?

[amykyta3]

Generally, I have not prioritized building burst support for any of the CPUIFs since this is rarely something that is required when manipulating CSR blocks from a CPU - usually applications will use single-word transfers initiated by the CPU to manipulate registers. DMA-initiated bursts tend to be more of an edge case for peripheral register blocks. Bursts are more common for bulk accesses of DRAMs, MMUs, caches, and other interconnect infrastructure.

Even so, I would certainly accept a PR that adds this as an enhancement!

[martin-tanguay]

Thanks for the answer. Burst support would be a nice feature for applications such as programming FIR filters with a significant amount of coefficients in a short period of time...