Long Viper Function Hangs

[samneggs]

I have a ~170 line viper function that locks up a Pico2. If I remark any random section to reduce the size, it runs fine.
In the past it may have generated an error but with the recent change in v1.26 maybe something is up:

Thumb v1 (for example RP2040) now supports long jumps greater than 12 bits, allowing larger Python functions to be compiled to this native architecture.

There are quite a few if statements so maybe the >12 bit long jumps happen in those.

I'm assuming it should work on my hardware:
MicroPython v1.26.0 on 2025-08-09; Raspberry Pi Pico2 with RP2350

[Josverl]

a ~170 line viper function

Something you can share or point to?

[GitHubsSilverBullet]

I tested 1.26 with unhealthy long viper functions. Works fine. Even with 5000 lines in a loop.
1.25 by the way failed as expected.

#!/micropython
# -*- coding: UTF-8 -*-
# vim: fileencoding=utf-8: ts=4: sw=4: expandtab:
#┌────────────────────────────────────────────────────────────────────────────┒
#│      Test long viper functions                                             ┃
#┕━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┛
from array import array
from random import randint

sz_arr = 1000
arr = array('I', (randint(0,2**31-1) for _ in range(sz_arr)))
cols = array('I', (0, 2147483647, 1131376761, 410151271, 157840433,
    58548857, 21521774, 8810089, 3501671, 1355339, 543749, 213331,
    84801, 27901, 11969, 4711, 1968, 815, 271, 111, 41, 13, 4, 1))
cols[0] = len(cols)     # length ──▶ item[0], data ──▶ item[1:]

head = '''@micropython.viper
def protosort(arr: ptr32, n: int, cols: ptr32):
    i: int
    j: int
    k: int
    h: int
    t: int

    loops: int = 5
    while loops:
'''
sortblock = '''        # ascending
        k = 1
        while k < cols[0]:
            h = cols[k]
            i = h
            while i < n:
                t = arr[i]
                j = i
                while j >= h and arr[j-h] > t:
                    arr[j] = arr[j-h]
                    j = j - h
                arr[j] = t
                i += 1
            k += 1

        # descending
        k = 1
        while k < cols[0]:
            h = cols[k]
            i = h
            while i < n:
                t = arr[i]
                j = i
                while j >= h and arr[j-h] < t:
                    arr[j] = arr[j-h]
                    j = j - h
                arr[j] = t
                i += 1
            k += 1
'''
tail = '''        loops -= 1
    return
'''

TEST_WITH_NUMSORTBLOCKS = 50

f_proto = head
for i in range(TEST_WITH_NUMSORTBLOCKS):
    f_proto += sortblock
f_proto += tail
exec(f_proto)

protosort(arr, len(arr), cols)
for item in arr:
    print(f'{item:20}')

print(f'{len(f_proto.split())} lines in function')

[samneggs]

Thanks for that test. I spent tried to reproduce it as well but could not.
Here is the suspect function. There are so many external dependencies it would be difficult to test. The whole program uses custom imports which would be verbose to include here.

The two test print statements is where I run into trouble. Note, these prints don't get executed but just having the second one causes a hang.
If print('hello') is removed it runs.

In the past I've seen array overruns which cause unpredictable behaviour. Maybe I'll start there.

def execute_robot_program(robot_id: int):                          # Execute robot program with new 32-bit opcodes
    global robot_programs
    bot = ptr32(BOT)                                               # Get robot parameters pointer
    prog = robot_programs[robot_id]                                # Get robot's program
    
    if not prog.active:                                            # No program loaded
        default_ai(robot_id)                                       # Use default AI instead
        return
    
    bytecode = ptr32(prog.bytecode)                                # Get program bytecode pointer
    registers = ptr32(prog.registers)                              # Get program registers pointer
    temp_registers = ptr32(prog.temp_registers)                    # Get temporary registers pointer
    
    i = robot_id * BOT_PARAMS                                      # Calculate robot parameter offset
    registers[REG_X] = bot[BOT_X + i]                             # Update X position register
    registers[REG_Y] = bot[BOT_Y + i]                             # Update Y position register
    registers[REG_DAMAGE] = bot[DAMAGE + i]                       # Update damage register
    registers[REG_AIM] = bot[GUN_AIM + i]                         # Update gun aim register
    registers[REG_SPEEDX] = bot[BOT_SPEED_X + i]                  # Update X velocity register
    registers[REG_SPEEDY] = bot[BOT_SPEED_Y + i]                  # Update Y velocity register
    registers[REG_RADAR] = bot[RADAR_DIST + i]                    # Update radar distance register
    
    if bot[FIRE_COOL + i] > 0:                                    # Gun cooling down
        registers[REG_SHOT] = bot[FIRE_COOL + i]                  # Show cooldown time
    else:
        registers[REG_SHOT] = 0                                   # Gun ready to fire
    
    instructions_executed = 0                                      # Reset instruction counter
    pc = int(prog.pc)                                             # Get program counter
    flags = int(prog.flags)                                       # Get condition flags
    
    while instructions_executed < INSTRUCTIONS_PER_FRAME:          # Execute instruction batch
        if pc >= MAX_PROGRAM_SIZE or pc < 0:                      # Bounds check program counter
            pc = 0                                                 # Reset to start if out of bounds
        
        instruction = bytecode[pc]                                 # Fetch current instruction
        opcode = (instruction >> 28) & 0xF                        # Extract 4-bit opcode
        imm12 = (instruction >> 16) & 0xFFF                       # Extract 12-bit immediate
        op1 = (instruction >> 8) & 0xFF                           # Extract 8-bit operand 1
        op_flags = (instruction >> 6) & 0x3                       # Extract 2-bit flags
        op2 = instruction & 0x3F                                  # Extract 6-bit operand 2
        
        # Sign extend 12-bit immediate if needed
        if imm12 & 0x800:                                         # Check sign bit
            imm12 = imm12 - 4096                                  # Convert to negative
        
        if opcode == OP_MOV:                                      # Move operation
            if op_flags & 0x1:                                    # Immediate to register
                if op1 < MAX_REGISTERS:                           # Bounds check destination
                    registers[op1] = imm12                        # Move immediate to register
                elif 128 <= op1 < 136:                            # Temporary register
                    temp_registers[op1 - 128] = imm12             # Move to temporary
            else:                                                  # Register to register
                src = op2                                          # Source register
                dst = op1                                          # Destination register
                if src < MAX_REGISTERS and dst < MAX_REGISTERS:   # Bounds check both
                    registers[dst] = registers[src]               # Move register to register
                elif src < MAX_REGISTERS and 128 <= dst < 136:   # Regular to temporary
                    temp_registers[dst - 128] = registers[src]    # Move to temporary
                elif 128 <= src < 136 and dst < MAX_REGISTERS:   # Temporary to regular
                    registers[dst] = temp_registers[src - 128]    # Move from temporary
                elif 128 <= src < 136 and 128 <= dst < 136:      # Temporary to temporary
                    temp_registers[dst - 128] = temp_registers[src - 128]  # Move between temporaries
            
            # Handle special register writes
            if op1 == REG_SPEEDX:                                 # X velocity control
                bot[BOT_SPEED_X + i] = registers[op1]             # Update bot X speed
            elif op1 == REG_SPEEDY:                               # Y velocity control
                bot[BOT_SPEED_Y + i] = registers[op1]             # Update bot Y speed
            elif op1 == REG_AIM:                                  # Gun aim control
                bot[GUN_AIM + i] = registers[op1] % 360           # Update gun angle
            elif op1 == REG_SHOT and registers[op1] > 0:         # Fire gun command
                if bot[FIRE_COOL + i] == 0:                       # Gun ready to fire
                    fire_missile(robot_id, registers[op1])        # Fire missile
            elif op1 == REG_RADAR:                                # Radar scan command
                deg = registers[op1] % 360                        # Normalize angle
                bot[RADAR_AIM + i] = deg                          # Set radar direction
                dist = int(aim_radar(bot[BOT_X + i] + 4, bot[BOT_Y + i] + 4, deg))  # Perform radar scan
                bot[RADAR_DIST + i] = dist                        # Store scan result
                registers[REG_RADAR] = dist                       # Update register
            elif op1 == REG_RANDOM:                               # Random seed control
                prog.random_limit = registers[op1] if registers[op1] > 0 else 100  # Set random range
        
        elif opcode == OP_ADD:                                    # Addition operation (accumulator style)
            if op_flags & 0x1:                                    # Register + immediate
                if op1 < MAX_REGISTERS:                           # Regular register
                    registers[op1] = registers[op1] + imm12       # Add immediate to register
                elif 128 <= op1 < 136:                            # Temporary register
                    temp_registers[op1 - 128] = temp_registers[op1 - 128] + imm12  # Add to temporary
            else:                                                  # Register + register
                if op1 < MAX_REGISTERS and op2 < MAX_REGISTERS:   # Both regular registers
                    registers[op1] = registers[op1] + registers[op2]  # Add registers
                elif 128 <= op1 < 136 and op2 < MAX_REGISTERS:   # Temporary + regular
                    temp_registers[op1 - 128] = temp_registers[op1 - 128] + registers[op2]  # Add to temporary
                elif 128 <= op1 < 136 and 128 <= op2 < 136:      # Temporary + temporary
                    temp_registers[op1 - 128] = temp_registers[op1 - 128] + temp_registers[op2 - 128]  # Add temporaries
        
        elif opcode == OP_SUB:                                    # Subtraction operation (accumulator style)
            if op_flags & 0x1:                                    # Register - immediate
                if op1 < MAX_REGISTERS:                           # Regular register
                    registers[op1] = registers[op1] - imm12       # Subtract immediate from register
                elif 128 <= op1 < 136:                            # Temporary register
                    temp_registers[op1 - 128] = temp_registers[op1 - 128] - imm12  # Subtract from temporary
            else:                                                  # Register - register
                if op1 < MAX_REGISTERS and op2 < MAX_REGISTERS:   # Both regular registers
                    print(100)
                    print('hello')

#                    registers[op1] = registers[op1] - registers[op2]  # Subtract registers
#                 elif 128 <= op1 < 136 and op2 < MAX_REGISTERS:   # Temporary - regular
#                     temp_registers[op1 - 128] = temp_registers[op1 - 128] - registers[op2]  # Subtract from temporary
#                 elif 128 <= op1 < 136 and 128 <= op2 < 136:      # Temporary - temporary
#                     temp_registers[op1 - 128] = temp_registers[op1 - 128] - temp_registers[op2 - 128]  # Subtract temporaries
#         
#         elif opcode == OP_MUL:                                    # Multiplication operation (accumulator style)
#             if op_flags & 0x1:                                    # Register * immediate
#                 if op1 < MAX_REGISTERS:                           # Regular register
#                     registers[op1] = registers[op1] * imm12       # Multiply register by immediate
#                 elif 128 <= op1 < 136:                            # Temporary register
#                     temp_registers[op1 - 128] = temp_registers[op1 - 128] * imm12  # Multiply temporary
#             else:                                                  # Register * register
#                 if op1 < MAX_REGISTERS and op2 < MAX_REGISTERS:   # Both regular registers
#                     registers[op1] = registers[op1] * registers[op2]  # Multiply registers
#                 elif 128 <= op1 < 136 and op2 < MAX_REGISTERS:   # Temporary * regular
#                     temp_registers[op1 - 128] = temp_registers[op1 - 128] * registers[op2]  # Multiply temporary
#                 elif 128 <= op1 < 136 and 128 <= op2 < 136:      # Temporary * temporary
#                     temp_registers[op1 - 128] = temp_registers[op1 - 128] * temp_registers[op2 - 128]  # Multiply temporaries
        
#         elif opcode == OP_DIV:                                    # Division operation (accumulator style)
#             if op_flags & 0x1:                                    # Register / immediate
#                 if imm12 != 0:                                    # Avoid division by zero
#                     if op1 < MAX_REGISTERS:                       # Regular register
#                         registers[op1] = registers[op1] // imm12  # Divide register by immediate
#                     elif 128 <= op1 < 136:                        # Temporary register
#                         temp_registers[op1 - 128] = temp_registers[op1 - 128] // imm12  # Divide temporary
#             else:                                                  # Register / register
#                 divisor = 0                                        # Initialize divisor
#                 if op2 < MAX_REGISTERS:                           # Regular register divisor
#                     divisor = registers[op2]                      # Get divisor value
#                 elif 128 <= op2 < 136:                            # Temporary register divisor
#                     divisor = temp_registers[op2 - 128]           # Get divisor from temporary
#                 
#                 if divisor != 0:                                  # Avoid division by zero
#                     if op1 < MAX_REGISTERS:                       # Regular register dividend
#                         registers[op1] = registers[op1] // divisor  # Divide register
#                     elif 128 <= op1 < 136:                        # Temporary register dividend
#                         temp_registers[op1 - 128] = temp_registers[op1 - 128] // divisor  # Divide temporary
        
        elif opcode == OP_CMP:                                    # Compare operation
            val1 = 0                                              # Initialize first value
            val2 = 0                                              # Initialize second value
            
            if op1 < MAX_REGISTERS:                               # Regular register
                val1 = registers[op1]                             # Get first value
            elif 128 <= op1 < 136:                                # Temporary register
                val1 = temp_registers[op1 - 128]                  # Get from temporary
            
            if op_flags & 0x1:                                    # Compare with immediate
                val2 = imm12                                      # Use immediate value
            else:                                                  # Compare with register
                if op2 < MAX_REGISTERS:                           # Regular register
                    val2 = registers[op2]                         # Get second value
                elif 128 <= op2 < 136:                            # Temporary register
                    val2 = temp_registers[op2 - 128]              # Get from temporary
            
            flags = 0                                             # Reset flags
            if val1 == val2:                                      # Set equal flag
                flags |= 1
            if val1 < val2:                                       # Set less than flag
                flags |= 2
            if val1 > val2:                                       # Set greater than flag
                flags |= 4
            prog.flags = flags                                    # Store comparison flags
        
        elif opcode == OP_BEQ:                                    # Branch if equal
            if flags & 1:                                         # Check equal flag
                target_addr = imm12                               # Get branch target from IMM12
                if 0 <= target_addr < MAX_PROGRAM_SIZE:           # Bounds check target
                    pc = target_addr - 1                          # Jump to target (-1 for increment)
        
        elif opcode == OP_BLT:                                    # Branch if less than
            if flags & 2:                                         # Check less than flag
                target_addr = imm12                               # Get branch target from IMM12
                if 0 <= target_addr < MAX_PROGRAM_SIZE:           # Bounds check target
                    pc = target_addr - 1                          # Jump to target (-1 for increment)
        
        elif opcode == OP_BGT:                                    # Branch if greater than
            if flags & 4:                                         # Check greater than flag
                target_addr = imm12                               # Get branch target from IMM12
                if 0 <= target_addr < MAX_PROGRAM_SIZE:           # Bounds check target
                    pc = target_addr - 1                          # Jump to target (-1 for increment)
        
        elif opcode == OP_BNE:                                    # Branch if not equal
            if not (flags & 1):                                   # Check not equal (equal flag clear)
                target_addr = imm12                               # Get branch target from IMM12
                if 0 <= target_addr < MAX_PROGRAM_SIZE:           # Bounds check target
                    pc = target_addr - 1                          # Jump to target (-1 for increment)
        
        elif opcode == OP_GOTO:                                   # Unconditional branch
            target_addr = imm12                                   # Get branch target from IMM12
            if 0 <= target_addr < MAX_PROGRAM_SIZE:               # Bounds check target
                pc = target_addr - 1                              # Jump to target (-1 for increment)
        
        elif opcode == OP_CALL:                                   # Subroutine call
            target_addr = imm12                                   # Get call target from IMM12
            if 0 <= target_addr < MAX_PROGRAM_SIZE:               # Bounds check target
                if int(prog.stack_ptr) < MAX_CALL_STACK:          # Check stack space
                    prog.call_stack[int(prog.stack_ptr)] = pc + 1  # Push return address
                    prog.stack_ptr = int(prog.stack_ptr) + 1      # Increment stack pointer
                    pc = target_addr - 1                          # Jump to subroutine (-1 for increment)
        
        elif opcode == OP_RET:                                    # Return from subroutine
            if int(prog.stack_ptr) > 0:                           # Check if stack has return address
                prog.stack_ptr = int(prog.stack_ptr) - 1          # Decrement stack pointer
                pc = int(prog.call_stack[int(prog.stack_ptr)])    # Pop return address
        
        pc += 1                                                    # Increment program counter
        instructions_executed += 1                                # Count executed instruction
        
        if pc >= MAX_PROGRAM_SIZE:                                # Bounds check after increment
            pc = 0                                                 # Reset if out of bounds
        
        if registers[REG_RANDOM] != int(prog.random_limit):       # Random register accessed
            registers[REG_RANDOM] = int(randint(0, int(prog.random_limit)))  # Generate new random
    
    prog.pc = pc                                                  # Save program counter
    prog.flags = flags                                            # Save condition flags

[samneggs]

500 works, 600 hangs
Doesn't like a big while

DEPTH = const(600)

src = "@micropython.viper\ndef big_jump() -> int:\n"
src += "    x = 0\n"
src += "    while x < 10:\n"
for i in range(DEPTH):
    src += f"        x += 1\n"
src += "    return x"

#print(src)
exec(src)
print(big_jump())

[GitHubsSilverBullet]

I don't know what kind of unholy "IDE" you use, but here it works quite well. ;-)

~/tmp$ cat x.py 
#!/micropython
# -*- coding: UTF-8 -*-
# vim: fileencoding=utf-8: ts=4: sw=4: expandtab:
DEPTH = const(2000)
src = "@micropython.viper\ndef big_jump() -> int:\n"
src += "    x = 0\n"
src += "    while x < 10:\n"
for i in range(DEPTH):
    src += f"        x += 1\n"
src += "    return x"
exec(src)
print(big_jump())
~/tmp$ picorun x.py
2000
~/tmp$ 

Edit:
Out of memory around 3550, which is expected.

[samneggs]

I verified the RP2040 works as you show but the RP2350 locks up.

[GitHubsSilverBullet]

Ouch! My fault. I did not read the reference to pico2. (And if I did, I wouldn't have thought about whether it'll make a difference in this instance without touching any internal hardware…)
You are absolutely correct with your observation.
Probably happens because of the change from Cortex-M0+ to Cortex-M33.

[agatti]

This should be fixed in #17946, by the way :)

[GitHubsSilverBullet]

as long as there are boards out that sport such a CPU

You mean like the … RP2350 / PICO2 board? ;-)

[agatti]

Oh silly me, I thought the RP2350 was ARMv7-M - my bad :)

Then yes, once my backlog clears up I'll definitely be on it: there's a pending PR for extra opcodes to use on the RP2350 in RV32 mode (with at least a couple more PRs coming up once that gets in and sets the foundation for parameterisable native emitters).

It's just fair I also give the Arm side of things the same treatment I guess.

Edit: Oh well, I can see at least a couple of places to make improvements to the emitter in order to benefit ARMv8 targets. It also depends on the maintainers team to see if it makes sense to allocate a new architecture number and keep the same MPY file structure version or not.

[GitHubsSilverBullet]

To be honest, I'd really like to switch completely to the RISC-V Hazard cores.
Unfortunately this particular RISC-V implementation has a lot of letter salad extensions,
but neither F,D nor – dare I say it – Q

[GitHubsSilverBullet]

It also depends on the maintainers team to see if it makes sense to allocate a new architecture number and keep the same MPY file structure version or not.

Wouldn't put it to high on the priority list. After all, should one need best speed, one would code in assembler directly.
I'd rather make the viper code really stable first.
The jump from v6-m to v8-m seems to be a rather significant task IMHO.

[agatti]

Wouldn't put it to high on the priority list. After all, should one need best speed, one would code in assembler directly. I'd rather make the viper code really stable first.

Well, I'd say Viper is pretty much stable these days - it may not be perfect but until people try to use it in ways it wasn't designed for nobody will never know of those issues (and nobody will fix them either!).

In 1.26 the emitters for @micropython.viper and @micropython.native were unified so the former can benefit of the latter's extended opcode range, and there's been a lot of work in speeding Viper up on all architectures - trust me I've been there ;)

The jump from v6-m to v8-m seems to be a rather significant task IMHO.

Not really. Adding ArmV8 support would take an afternoon, probably less. Then there's testing and validation and whatnot, but code-wise it's not a big deal. Keep in mind that regular Armv6 code (as in, ignoring supervisor mode and memory model idiosyncrasies and the like) is valid Armv7 code, and valid Armv7 code is valid Armv8 code (same caveat applies) :)