The Vertical (Line 30) focusing on FPGAs and ASICs will run under EN 50767. [Link to reference: ](https://standards.cencenelec.eu/dyn/www/f?p=305:110:0::::FSP_PROJECT,FSP_LANG_ID:82281,25&cs=19D2C1433FA3A193C97206E81EE278F0F)