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MIR Codegen: Liveness Analysis #694
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A-codegenArea: code generation and MIRArea: code generation and MIRC-enhancementCategory: an issue proposing an enhancement or a PR with oneCategory: an issue proposing an enhancement or a PR with oneE-mediumCall for participation: Medium difficulty. Experience needed to fix: Intermediate.Call for participation: Medium difficulty. Experience needed to fix: Intermediate.
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A-codegenArea: code generation and MIRArea: code generation and MIRC-enhancementCategory: an issue proposing an enhancement or a PR with oneCategory: an issue proposing an enhancement or a PR with oneE-mediumCall for participation: Medium difficulty. Experience needed to fix: Intermediate.Call for participation: Medium difficulty. Experience needed to fix: Intermediate.
Summary
Implement precise SSA-based liveness analysis as a reusable analysis that stack allocation, DCE, and spilling passes depend on.
Parent issue: #687
Context
The MIR is SSA-based, which means we can use standard dataflow analysis techniques. Liveness analysis tells us which values are "live" (will be used later) at each program point. This is essential for:
Tasks
Per-block local use/def sets
Inst, computeuses(inst)anddef(inst)(single SSA result or none)BasicBlock, precomputeblock_usesandblock_defsGlobal backward dataflow liveness
live_out[B] = ⋃ live_in[succ]live_in[B] = block_uses[B] ∪ (live_out[B] \ block_defs[B])ValueIdPer-instruction liveness
live_in_instandlive_out_instAPIs for later passes
fn live_in(block, inst_idx) -> &BitSet<ValueId>fn live_out(block, inst_idx) -> &BitSet<ValueId>fn last_use(value) -> InstIdhelper for scheduling heuristicsPatterns to follow
From Sonatina:
From Venom:
Acceptance Criteria
valueis used atinst, thenvalue ∈ live_in(inst)Estimated Complexity
Medium - Standard dataflow algorithm, but needs careful implementation for efficiency
Dependencies