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| 1 | +The following compute partition and NUMA-per-socket (NPS) configurations are |
| 2 | +available on AMD Instinct GPUs in bare metal deployments. |
| 3 | + |
| 4 | +<table class="rocm-docs-table table"> |
| 5 | + <thead> |
| 6 | + <tr> |
| 7 | + <th class="head"> |
| 8 | + <p>Deployment</p> |
| 9 | + </th> |
| 10 | + <th class="head"> |
| 11 | + <p>Device</p> |
| 12 | + </th> |
| 13 | + <th class="head"> |
| 14 | + <p>Compute partition mode</p> |
| 15 | + </th> |
| 16 | + <th class="head"> |
| 17 | + <p>Memory partition mode</p> |
| 18 | + </th> |
| 19 | + </tr> |
| 20 | + </thead> |
| 21 | + <tbody> |
| 22 | + <tr> |
| 23 | + <td rowspan="7" style="vertical-align: middle;"> |
| 24 | + <p>Bare metal</p> |
| 25 | + </td> |
| 26 | + <td rowspan="3" style="vertical-align: middle;"> |
| 27 | + <p>Instinct MI355X, MI350X</p> |
| 28 | + </td> |
| 29 | + <td> |
| 30 | + <p>CPX</p> |
| 31 | + </td> |
| 32 | + <td> |
| 33 | + <p>NPS2</p> |
| 34 | + </td> |
| 35 | + </tr> |
| 36 | + <tr> |
| 37 | + <td> |
| 38 | + <p>DPX</p> |
| 39 | + </td> |
| 40 | + <td> |
| 41 | + <p>NPS2</p> |
| 42 | + </td> |
| 43 | + </tr> |
| 44 | + <tr> |
| 45 | + <td> |
| 46 | + <p>QPX</p> |
| 47 | + </td> |
| 48 | + <td> |
| 49 | + <p>NPS2</p> |
| 50 | + </td> |
| 51 | + </tr> |
| 52 | + <tr> |
| 53 | + <td rowspan="2" style="vertical-align: middle;"> |
| 54 | + <p>Instinct MI350P</p> |
| 55 | + </td> |
| 56 | + <td> |
| 57 | + <p>CPX</p> |
| 58 | + </td> |
| 59 | + <td> |
| 60 | + <p>NPS1</p> |
| 61 | + </td> |
| 62 | + </tr> |
| 63 | + <tr> |
| 64 | + <td> |
| 65 | + <p>SPX</p> |
| 66 | + </td> |
| 67 | + <td> |
| 68 | + <p>NPS1</p> |
| 69 | + </td> |
| 70 | + </tr> |
| 71 | + <tr> |
| 72 | + <td rowspan="2" style="vertical-align: middle;"> |
| 73 | + <p>Instinct MI300X</p> |
| 74 | + </td> |
| 75 | + <td> |
| 76 | + <p>CPX</p> |
| 77 | + </td> |
| 78 | + <td> |
| 79 | + <p>NPS4</p> |
| 80 | + </td> |
| 81 | + </tr> |
| 82 | + <tr> |
| 83 | + <td> |
| 84 | + <p>DPX</p> |
| 85 | + </td> |
| 86 | + <td> |
| 87 | + <p>NPS2</p> |
| 88 | + </td> |
| 89 | + </tr> |
| 90 | + </tbody> |
| 91 | +</table> |
| 92 | + |
| 93 | +The following configurations are available on AMD Instinct GPUs in SR-IOV |
| 94 | +deployments. See {ref}`release-virtualization-support` for driver support |
| 95 | +information. |
| 96 | + |
| 97 | +<table class="rocm-docs-table table"> |
| 98 | + <thead> |
| 99 | + <tr> |
| 100 | + <th class="head"> |
| 101 | + <p>Deployment</p> |
| 102 | + </th> |
| 103 | + <th class="head"> |
| 104 | + <p>Device</p> |
| 105 | + </th> |
| 106 | + <th class="head"> |
| 107 | + <p>VFs per GPU</p> |
| 108 | + </th> |
| 109 | + <th class="head"> |
| 110 | + <p>Compute partition mode</p> |
| 111 | + </th> |
| 112 | + <th class="head"> |
| 113 | + <p>Memory partition mode</p> |
| 114 | + </th> |
| 115 | + </tr> |
| 116 | + </thead> |
| 117 | + <tbody> |
| 118 | + <tr> |
| 119 | + <td rowspan="7" style="vertical-align: middle;"> |
| 120 | + <p>KVM SR-IOV</p> |
| 121 | + </td> |
| 122 | + <td rowspan="3" style="vertical-align: middle;"> |
| 123 | + <p>Instinct MI355X, MI350X</p> |
| 124 | + </td> |
| 125 | + <td rowspan="3" style="vertical-align: middle;"> |
| 126 | + <p>1</p> |
| 127 | + </td> |
| 128 | + <td> |
| 129 | + <p>SPX</p> |
| 130 | + </td> |
| 131 | + <td> |
| 132 | + <p>NPS1</p> |
| 133 | + </td> |
| 134 | + </tr> |
| 135 | + <tr> |
| 136 | + <td> |
| 137 | + <p>CPX</p> |
| 138 | + </td> |
| 139 | + <td> |
| 140 | + <p>NPS2</p> |
| 141 | + </td> |
| 142 | + </tr> |
| 143 | + <tr> |
| 144 | + <td> |
| 145 | + <p>DPX</p> |
| 146 | + </td> |
| 147 | + <td> |
| 148 | + <p>NPS2</p> |
| 149 | + </td> |
| 150 | + </tr> |
| 151 | + <tr> |
| 152 | + <td style="vertical-align: middle;"> |
| 153 | + <p>Instinct MI325X</p> |
| 154 | + </td> |
| 155 | + <td> |
| 156 | + <p>1</p> |
| 157 | + </td> |
| 158 | + <td> |
| 159 | + <p>SPX</p> |
| 160 | + </td> |
| 161 | + <td> |
| 162 | + <p>NPS1</p> |
| 163 | + </td> |
| 164 | + </tr> |
| 165 | + <tr> |
| 166 | + <td rowspan="2" style="vertical-align: middle;"> |
| 167 | + <p>Instinct MI300X (preview)</p> |
| 168 | + </td> |
| 169 | + <td> |
| 170 | + <p>1</p> |
| 171 | + </td> |
| 172 | + <td> |
| 173 | + <p>SPX</p> |
| 174 | + </td> |
| 175 | + <td> |
| 176 | + <p>NPS1</p> |
| 177 | + </td> |
| 178 | + </tr> |
| 179 | + <tr id="id1"> |
| 180 | + <td> |
| 181 | + <p>8 |
| 182 | + <a class="footnote-reference brackets" href="#partitioning-support-footnotes" role="doc-noteref"><span class="fn-bracket">[</span>*<span class="fn-bracket">]</span></a></p> |
| 183 | + </td> |
| 184 | + <td> |
| 185 | + <p>CPX</p> |
| 186 | + </td> |
| 187 | + <td> |
| 188 | + <p>NPS4</p> |
| 189 | + </td> |
| 190 | + </tr> |
| 191 | + </tbody> |
| 192 | +</table> |
| 193 | + |
| 194 | +<aside class="footnote brackets" id="partitioning-support-footnotes" role="doc-footnote"> |
| 195 | +<span id="#fn1" class="label"><span class="fn-bracket">[</span><a href="#id1" role="doc-backlink">*</a><span class="fn-bracket">]</span></span> |
| 196 | +<p>Multi-VF (8 VF) support requires a compatible firmware. See <a href="#kernel-driver-and-firmware-bundle-support">Kernel driver and firmware bundle support</a> for the list of required firmware versions and supported configurations.</p> |
| 197 | +</aside> |
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