PCIE & PCI双重支持

Author: xiaoyi1212

src/core/main.c

@@ -75,7 +75,7 @@ void kmain(void) {
     vfs_init();
     vdisk_init();
     pcie_init();
-    nvme_setup();
+    //nvme_setup();
     //ahci_setup();
     //xhci_setup();
 

src/driver/iic/iic_basic_implementation.c

@@ -53,8 +53,7 @@ uint32_t iic_dataTransfer(IIC_Data *frame) {
 
 uint8_t Get_iic_masterAddress(pci_device_t *IIC_Master_Controller) {
     // 获取IIC主机控制器基地址
-    base_address_register bar = find_bar(*IIC_Master_Controller, 0);
-    uint8_t base_address = *bar.address;
+    uint8_t base_address = *(uint8_t*)(*IIC_Master_Controller)->bars[0].address;
     return base_address;
 }
 

src/driver/pci/nvme.c

@@ -148,11 +148,15 @@ void NvmeWrite(int id, uint8_t *buf, uint32_t count, uint32_t idx) {
 }
 
 void nvme_setup() {
-    pcie_device_t *device = pcie_find_class(0x10802);
+    pci_device_t device = pci_find_class(0x10802);
     if (device == NULL) {
         return;
     }
     nvme_capability *capability = (nvme_capability *) phys_to_virt(device->bars[0].address);
+    if(capability == NULL){
+        kerror("Nvme controller bar 0 is null\n");
+        return;
+    }
     page_map_range_to(get_kernel_pagedir(), device->bars[0].address, 0x1000, KERNEL_PTE_FLAGS);
 
     if (!((capability->CAP >> 37) & 1)) {

src/driver/pci/pci.c

@@ -145,7 +145,7 @@ pci_device_t pci_device[PCI_DEVICE_MAX];
 uint32_t device_number = 0;
 
 uint32_t get_pci_num() {
-    return PCI_NUM;
+    return device_number;
 }
 
 char *pci_classname(uint32_t classcode) {
@@ -212,42 +212,6 @@ void write_pci(pci_device_t device,uint8_t offset, uint32_t value){
     write_pci0(device->bus,device->slot,device->func,offset,value);
 }
 
-int pci_find_capability(pci_device_t device, uint8_t cap_id) {
-    uint8_t pos = (uint8_t)(read_pci(device, PCI_CAPABILITY_LIST) & 0xFF);
-    if (pos == 0) {
-        return 0;
-    }
-
-    while (pos != 0) {
-        uint8_t id = (uint8_t)(read_pci(device, pos + PCI_CAP_LIST_ID) & 0xFF);
-        if (id == cap_id) {
-            return pos;
-        }
-        pos = (uint8_t)(read_pci(device, pos + PCI_CAP_LIST_NEXT) & 0xFF);
-    }
-
-    return 0;
-}
-
-void pci_set_msi(pci_device_t device,uint8_t vector){
-    device->msi_offset = pci_find_capability(device,PCI_CAP_ID_MSI);
-    uint32_t msg_ctrl = read_pci(device,device->msi_offset + 2);
-    uint8_t reg0 = 0x4;
-    uint8_t reg1 = 0x8;
-
-    if (((msg_ctrl >> 7) & 1) == 1) {
-        reg1 = 0xc;
-    }
-
-    uint64_t address = (0xfee << 20) | (lapic_id() << 12);
-    uint8_t data = vector;
-    write_pci(device,device->msi_offset + reg0,address);
-    write_pci(device,device->msi_offset + reg1,data);
-    msg_ctrl |= 1;
-    msg_ctrl &= ~(7 << 4);
-    write_pci(device,device->msi_offset + 2,msg_ctrl);
-}
-
 static base_address_register get_base_address_register(uint8_t bus, uint8_t device, uint8_t function, uint8_t bar) {
     base_address_register result = {0, NULL, 0, 0};
 
@@ -307,6 +271,10 @@ static void load_pci_device(uint32_t BUS, uint32_t Equipment, uint32_t F){
     uint16_t vendor_id = value_v & 0xffff;
     uint16_t device_id = value_d & 0xffff;
 
+    if(class_code == 0x060400 || (class_code & 0xFFFF00) == 0x060400){
+        return;
+    }
+
     pci_device_t device = malloc(sizeof(struct pci_device));
     device->name = pci_classname(class_code);
     device->vendor_id = vendor_id;
@@ -315,45 +283,59 @@ static void load_pci_device(uint32_t BUS, uint32_t Equipment, uint32_t F){
     device->bus = BUS;
     device->slot = Equipment;
     device->func = F;
+    device->is_pcie = false;
+
+    for (size_t i = 0; i < 6; i++) {
+        if(pci_bar_present(device,i)){
+            base_address_register reg = get_base_address_register(BUS,Equipment,F,i);
+            device->bars[i].address = (uint64_t)reg.address;
+            device->bars[i].mmio = !reg.type;
+        }
+    }
 
     if (device_number > PCI_DEVICE_MAX) {
         kwarn("add device full %d", device_number);
         return;
     }
     pci_device[device_number++] = device;
-
-    if(device->class_code == 0x060400 || (device->class_code & 0xFFFF00) == 0x060400){
-        return;
-    }
 }
 
 void print_all_pci() {
-    printk("Bus:Slot:Func\t[Vendor:Device]\tClass Code\tName\n");
+    printk("Bus:Slot:Func\t[Vendor:Device]\tClass Code\tType\tName\n");
     for (size_t i = 0; i < device_number; i++) {
         pci_device_t device = pci_device[i];
-        printk("%03d:%02d:%02d\t[0x%04X:0x%04X]\t<0x%08x>\t%s\n",
+        printk("%03d:%02d:%02d\t[0x%04X:0x%04X]\t<0x%08x>\t%s\t%s\n",
                device->bus,
                device->slot,
                device->func,
                device->vendor_id,
                device->device_id,
                device->class_code,
+               device->is_pcie ? "PCIE" : "PCI ",
                device->name);
     }
 }
 
+static bool has_device(uint32_t bus,uint32_t slot,uint32_t func){
+    for(size_t i = 0; i < device_number;i++){
+        pci_device_t device = pci_device[i];
+        if(device->bus == bus && device->slot == slot && device->func == func) return true;
+    }
+    return false;
+}
+
 void pci_setup(){
     uint32_t BUS, Equipment, F;
     for (BUS = 0; BUS < 256; BUS++) {
         for (Equipment = 0; Equipment < 32; Equipment++) {
             for (F = 0; F < 8; F++) {
                 pci_config0(BUS,F,Equipment,0);
                 if(io_in32(PCI_DATA_PORT) != 0xFFFFFFFF){
-                    PCI_NUM++;
+                    if(has_device(BUS,Equipment,F)) break;
                     load_pci_device(BUS,Equipment,F);
                 }
             }
         }
     }
-    kinfo("PCI device loaded: %d", PCI_NUM);
+    kinfo("PCI device loaded: %d", device_number);
 }

src/driver/pci/pcie.c

@@ -9,8 +9,8 @@
 MCFG_ENTRY *mcfg_entries[PCI_MCFG_MAX_ENTRIES_LEN];
 MCFG *mcfg;
 uint64_t mcfg_entries_len = 0;
-pcie_device_t *pci_devices[PCI_DEVICE_MAX];
-uint32_t pci_device_number = 0;
+extern pci_device_t pci_device[PCI_DEVICE_MAX];
+extern uint32_t device_number;
 bool is_pcie = false; // 是否是PCIE模式 (CP_Kernel无法加载PCIE驱动时候会切换回默认的PCI)
 
 static uint64_t
@@ -46,13 +46,13 @@ void mcfg_addr_to_entries(MCFG_ENTRY **entries) {
     }
 }
 
-uint32_t pcie_read_command(pcie_device_t *device, uint8_t offset) {
+uint32_t pci_read_command(pci_device_t device, uint8_t offset) {
     uint32_t address = (1 << 31) | (device->bus << 16) | (device->slot << 11) | (device->func << 8) | (offset & 0xFC);
     io_out32(PCI_COMMAND_PORT,address);
     return io_in32(PCI_DATA_PORT);
 }
 
-void pcie_write_command(pcie_device_t *device,uint8_t offset,uint32_t value){
+void pci_write_command(pci_device_t device,uint8_t offset,uint32_t value){
     uint32_t address = (1 << 31) | (device->bus << 16) | (device->slot << 11) | (device->func << 8) | (offset & 0xFC);
     io_out32(PCI_COMMAND_PORT,address);
     io_out32(PCI_DATA_PORT,value);
@@ -80,45 +80,46 @@ void pci_scan_function(uint16_t segment_group, uint8_t bus, uint8_t device, uint
     switch (*((uint8_t *) header_type_mmio_addr + 2)) {
         // Endpoint
         case 0x00: {
-            pcie_device_t *pci_device = (pcie_device_t *) malloc(sizeof(pcie_device_t));
+            pci_device_t pci_device0 = (pci_device_t )malloc(sizeof(struct pci_device));
             uint32_t class_code_24bit = (device_class << 16) | (device_subclass << 8) | device_interface;
-            pci_device->class_code = class_code_24bit;
-            pci_device->vendor_id = vendor_id;
-            pci_device->device_id = device_id;
+            pci_device0->class_code = class_code_24bit;
+            pci_device0->vendor_id = vendor_id;
+            pci_device0->device_id = device_id;
 
-            pci_device->segment = segment_group;
-            pci_device->bus = bus;
-            pci_device->slot = device;
-            pci_device->func = function;
+            pci_device0->segment = segment_group;
+            pci_device0->bus = bus;
+            pci_device0->slot = device;
+            pci_device0->func = function;
 
             for (int i = 0; i < 6; i++) {
                 int offset = 0x10 + i * 4;
                 uint64_t bars_mmio_address = get_mmio_address(pci_address, offset);
                 uint32_t bar = *(uint32_t *) bars_mmio_address;
 
                 if (bar & 0x01) {
-                    pci_device->bars[i].address = bar & 0xFFFFFFFC;
-                    pci_device->bars[i].mmio = false;
+                    pci_device0->bars[i].address = bar & 0xFFFFFFFC;
+                    pci_device0->bars[i].mmio = false;
                 } else {
                     bool prefetchable = bar & (1 << 3);
                     UNUSED(prefetchable);
                     uint64_t bar_address = bar & 0xFFFFFFF0;
                     uint16_t bit = (bar & ((1 << 3) | (1 << 2) | (1 << 1))) >> 1;
 
                     if(bit == 0){ //0b00
-                        pci_device->bars[i].address = bar & 0xFFFFFFFC;
-                        pci_device->bars[i].mmio = true;
+                        pci_device0->bars[i].address = bar & 0xFFFFFFFC;
+                        pci_device0->bars[i].mmio = true;
                     } else if(bit == 2){ //0b10
                         uint32_t bar_address_upper = *((uint32_t *) bars_mmio_address + 1);
                         bar_address |= ((uint64_t) bar_address_upper << 32);
-                        pci_device->bars[i].address = bar_address;
-                        pci_device->bars[i].mmio = true;
+                        pci_device0->bars[i].address = bar_address;
+                        pci_device0->bars[i].mmio = true;
                     }
                 }
             }
-            pci_device->name = pci_classname(pci_device->class_code);
-            pci_devices[pci_device_number] = pci_device;
-            pci_device_number++;
+            pci_device0->name = pci_classname(pci_device0->class_code);
+            pci_device0->is_pcie = true;
+            pci_device[device_number] = pci_device0;
+            device_number++;
         }
             break;
             // PciPciBridge
@@ -158,55 +159,34 @@ void pci_scan_segment(uint16_t segment_group) {
     }
 }
 
-uint32_t get_pcie_num() {
-    return is_pcie ? pci_device_number : get_pci_num();
-}
-
 void print_all_pcie() {
-    if(!is_pcie){
-        print_all_pci();
-        printk("Model: PCI\n");
-        return;
-    }
-    printk("Bus:Slot:Func\t[Vendor:Device]\tClass Code\tName\n");
-    for (size_t i = 0; i < pci_device_number; i++) {
-        pcie_device_t *device = pci_devices[i];
-        printk("%03d:%02d:%02d\t[0x%04X:0x%04X]\t<0x%08x>\t%s\n",
+    printk("Bus:Slot:Func\t[Vendor:Device]\tClass Code\tType\tName\n");
+    for (size_t i = 0; i < device_number; i++) {
+        pci_device_t device = pci_device[i];
+        printk("%03d:%02d:%02d\t[0x%04X:0x%04X]\t<0x%08x>\t%s\t%s\n",
                device->bus,
                device->slot,
                device->func,
                device->vendor_id,
                device->device_id,
                device->class_code,
+               device->is_pcie ? "PCIE" : "PCI ",
                device->name);
     }
-    printk("Model: PCIE\n");
-}
-
-pcie_device_t *pcie_find_class(uint32_t class_code) {
-    for (size_t i = 0; i < pci_device_number; i++) {
-        if (pci_devices[i]->class_code == class_code) {
-            return pci_devices[i];
-        }
-        if (class_code == (pci_devices[i]->class_code & 0xFFFF00)) {
-            return pci_devices[i];
-        }
-    }
-    return NULL;
 }
 
 void pcie_init() {
     if (mcfg == NULL) {
-        pci_setup();
-        return;
+        goto pci;
     }
     mcfg_addr_to_entries(mcfg_entries);
     for (size_t i = 0; i < mcfg_entries_len; i++) {
         uint16_t segment_group = mcfg_entries[i]->pci_segment_group;
         pci_scan_segment(segment_group);
     }
     is_pcie = true;
-    kinfo("PCIE device find %d",pci_device_number);
+    pci:
+    pci_setup();
 }
 
 /**

src/driver/pci/xhci.c

@@ -1,15 +1,16 @@
 #include "xhci.h"
-#include "pcie.h"
+#include "pci.h"
 #include "kprint.h"
+#include "pcie.h"
 
 void xhci_setup(){
-    pcie_device_t *device = pcie_find_class(0xc0300);
+    pci_device_t device = pci_find_class(0xc0300);
     if(device == NULL) return;
 
-    uint32_t command = pcie_read_command(device,2);
+    uint32_t command = pci_read_command(device,2);
     command &= ~(PCI_COMMAND_IO | PCI_COMMAND_INT_DISABLE);
     command |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
-    pcie_write_command(device,2,command);
+    pci_write_command(device,2,command);
 
     kinfo("Loading USB 3.0 driver.");
 }

src/include/nvme.h

@@ -16,7 +16,7 @@
 
 
 #include "ctype.h"
-#include "pcie.h"
+#include "pci.h"
 
 typedef struct NVME_CONTROLLER nvme_controller;
 
@@ -79,7 +79,7 @@ typedef struct _NVME_SUBMISSION_QUEUE{
 } __attribute__((packed)) NVME_SUBMISSION_QUEUE;
 
 typedef struct NVME_CONTROLLER{
-    pcie_device_t *DVC;
+    pci_device_t DVC;
     nvme_capability *CAP;
     NVME_COMPLETION_QUEUE ACQ;
     NVME_SUBMISSION_QUEUE ASQ;

src/include/pci.h

@@ -24,16 +24,23 @@
 
 #include "ctype.h"
 
+
+typedef struct{
+    uint64_t address;
+    bool mmio;
+} pci_bar_base_address;
+
 struct pci_device{
-    char* name;
+    char *name;
     uint32_t class_code;
     uint16_t vendor_id;
     uint16_t device_id;
+    uint16_t segment;
     uint8_t bus;
     uint8_t slot;
     uint8_t func;
-    uint8_t irq_pin;
-    uint16_t msi_offset;
+    pci_bar_base_address bars[6];
+    bool is_pcie;
 };
 
 typedef struct base_address_register {
@@ -57,6 +64,4 @@ uint32_t pci_read_command_status(pci_device_t device);
 void print_all_pci();
 uint32_t get_pci_num();
 bool pci_bar_present(pci_device_t device,uint8_t bar);
-int pci_find_capability(pci_device_t device, uint8_t cap_id);
-void pci_set_msi(pci_device_t device,uint8_t vector);
 void pci_setup();