feat: add support for riscv64

The macos_compat layer should also include a `JMP_BUF_SIZE` const (or a
totally different structure, just like with glibc), but it has been
omitted because there is no support for RISC V at the moment.

The asm based implementation should be fine for riscv32, but I did not
check what `JmpBufFields` should be.

Author: dodomorandi

build/get_riscv64_consts.c

@@ -0,0 +1,9 @@
+#include <setjmp.h>
+
+#if defined __riscv_float_abi_double
+CEE_SCAPE_FLOAT_ABI_DOUBLE
+#endif
+
+#if defined __riscv_float_abi_soft
+CEE_SCAPE_FLOAT_ABI_SOFT
+#endif

build/main.rs

@@ -21,4 +21,42 @@ fn main() {
             .compile("interop_via_c");
     } else {
     }
+
+    if cfg!(target_arch = "riscv64") {
+        generate_riscv64_consts();
+    }
+}
+
+fn generate_riscv64_consts() {
+    println!("cargo:rerun-if-changed=build/get_riscv64_consts.c");
+
+    let expanded = cc::Build::new().file("build/get_riscv64_consts.c").expand();
+    let expanded = String::from_utf8(expanded).unwrap();
+
+    let mut float_abi_double = false;
+    let mut float_abi_soft = false;
+    for line in expanded.lines() {
+        match line.trim() {
+            "CEE_SCAPE_FLOAT_ABI_DOUBLE" => float_abi_double = true,
+            "CEE_SCAPE_FLOAT_ABI_SOFT" => float_abi_soft = true,
+            _ => {}
+        }
+    }
+
+    let out_dir: PathBuf = std::env::var("OUT_DIR")
+        .expect("OUT_DIR env variable should be available")
+        .into();
+    println!("cargo::rustc-env=OUT_DIR={}", out_dir.display());
+
+    let mut riscv64_consts_file = File::create(out_dir.join("riscv64_consts.rs"))
+        .expect("unable to create riscv64_consts.rs");
+    writeln!(
+        riscv64_consts_file,
+        "const FLOAT_ABI_DOUBLE: bool = {float_abi_double};\n\
+        const FLOAT_ABI_SOFT: bool = {float_abi_soft};"
+    )
+    .expect("unable to write to riscv64_consts.rs");
+    riscv64_consts_file
+        .flush()
+        .expect("unable to write to riscv64_consts.rs");
 }

src/asm_based.rs

@@ -118,6 +118,34 @@ macro_rules! maybesig_setjmp_asm {
     }
 }
 
+#[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
+macro_rules! maybesig_setjmp_asm {
+    ($sigsetjmp:ident, $jbuf_ptr:ident, $ifsig_savemask:ident, $closure_env_ptr:ident, $c2r:ident, $ret:ident) => {
+        core::arch::asm!(
+            // savemask, if needed, is already in a1
+            "mv a0, s3",     // move saved jbuf_ptr to sigsetjmp param position. (savemask is already in position)
+            "jalr 0({tmp})", // fills in jbuf; future longjmp calls go here.
+            "bnez a0, 1f",   // if return value non-zero, skip the callback invocation
+                             // (and if return value non-zero, we cannot assume register state has been restored!)
+            "mv a0, s3",     // move saved jmp buf into callback's arg position
+            "mv a1, s2",     // move saved closure env into callback's arg position
+            "jalr 0(s4)",    // invoke the callback
+            "1:",            // at this point, a0 carries the return value (from either outcome)
+            // we let compiler pick this register since we don't need to preseve
+            // it across the first call.
+            tmp = in(reg) $sigsetjmp,
+            in("a1") $ifsig_savemask, // savemask arg position for sigsetjmp
+            out("a0") $ret, // the output will be stored here.
+            // [s2,s3,s4] are all callee-save registers for the normal sigsetjmp return.
+            // we will have them to reference.
+            in("s2") $closure_env_ptr,
+            in("s3") $jbuf_ptr,
+            in("s4") $c2r,
+            clobber_abi("C"), // clobber abi reflects call effects, including {x1,x5,x6,x7}...
+        );
+    }
+}
+
 /// Covers the usual use case for setjmp: it invokes the callback, and the code
 /// of the callback can use longjmp to exit early from the call_with_setjmp.
 #[inline(never)] // see https://github.com/pnkfelix/cee-scape/issues/14

src/glibc_compat.rs

@@ -9,6 +9,23 @@ pub struct JmpBufFields {
     _neither_send_nor_sync: PhantomData<*const u8>,
 }
 
+/// `JmpBufFields` are the accessible fields when viewed via a JmpBuf pointer.
+/// But also: You shouldn't be poking at these!
+#[cfg(target_arch = "riscv64")]
+#[repr(C)]
+pub struct JmpBufFields {
+    /// Program counter.
+    __pc: i64,
+    /// Callee-saved registers.
+    __regs: [i64; 12],
+    /// Stack pointer.
+    __sp: i64,
+    /// Callee-saved floating point registers.
+    __fpregs: [f64; crate::riscv64::floating_point_registers()],
+
+    _neither_send_nor_sync: PhantomData<*const u8>,
+}
+
 /// `SigJmpBufFields` are the accessible fields when viewed via a SigJmpBuf pointer.
 /// But also: You shouldn't be poking at these!
 #[repr(C)]

src/lib.rs

@@ -182,6 +182,8 @@ use libc::c_int;
 mod glibc_compat;
 #[cfg(target_os = "macos")]
 mod macos_compat;
+#[cfg(target_arch = "riscv64")]
+mod riscv64;
 #[cfg(target_os = "linux")]
 use glibc_compat as struct_defs;
 #[cfg(target_os = "macos")]

src/riscv64.rs

@@ -0,0 +1,11 @@
+include!(concat!(env!("OUT_DIR"), "/riscv64_consts.rs"));
+
+pub const fn floating_point_registers() -> usize {
+    if FLOAT_ABI_DOUBLE {
+        12
+    } else if !FLOAT_ABI_SOFT {
+        panic!("unsupported number of floating point registers");
+    } else {
+        0
+    }
+}