@@ -28,26 +28,38 @@ struct console_uart {
2828 uint32_t reg_width ;
2929};
3030
31+ #ifndef CONFIG_SERIAL_REG_WIDTH
32+ #if defined(CONFIG_SERIAL_PIO_BASE )
33+ #define CONFIG_SERIAL_REG_WIDTH 1
34+ #elif defined(CONFIG_SERIAL_PCI_BDF )
35+ #define CONFIG_SERIAL_REG_WIDTH 4
36+ #elif defined(CONFIG_SERIAL_MMIO_BASE )
37+ #define CONFIG_SERIAL_REG_WIDTH 1
38+ #else
39+ #define CONFIG_SERIAL_REG_WIDTH 1
40+ #endif
41+ #endif
42+
3143#if defined(CONFIG_SERIAL_PIO_BASE )
3244static struct console_uart uart = {
33- .enabled = true,
34- .type = PIO ,
35- .port_address = CONFIG_SERIAL_PIO_BASE ,
36- .reg_width = 1 ,
45+ .enabled = true,
46+ .type = PIO ,
47+ .port_address = CONFIG_SERIAL_PIO_BASE ,
48+ .reg_width = CONFIG_SERIAL_REG_WIDTH ,
3749};
3850#elif defined(CONFIG_SERIAL_PCI_BDF )
3951static struct console_uart uart = {
40- .enabled = true,
41- .type = PCI ,
42- .bdf .value = CONFIG_SERIAL_PCI_BDF ,
43- .reg_width = 4 ,
52+ .enabled = true,
53+ .type = PCI ,
54+ .bdf .value = CONFIG_SERIAL_PCI_BDF ,
55+ .reg_width = CONFIG_SERIAL_REG_WIDTH ,
4456};
4557#elif defined(CONFIG_SERIAL_MMIO_BASE )
4658static struct console_uart uart = {
47- .enabled = true,
48- .type = MMIO ,
49- .mmio_base_vaddr = (void * )CONFIG_SERIAL_MMIO_BASE ,
50- .reg_width = 1 ,
59+ .enabled = true,
60+ .type = MMIO ,
61+ .mmio_base_vaddr = (void * )CONFIG_SERIAL_MMIO_BASE ,
62+ .reg_width = CONFIG_SERIAL_REG_WIDTH ,
5163};
5264#endif
5365
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