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[source] fix a corner case highlighted in RedMulE for misaligned access
In some corner case, visible in RedMulE before this fix, spurious gnt's without a related req may be back-propagated from hci_core_fifo to the addr_misaligned fifo in hci_core_source. This causes phantom address transactions to propagate.
1 parent 9095c85 commit a8d8132

2 files changed

Lines changed: 2 additions & 2 deletions

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rtl/core/hci_core_source.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -235,7 +235,7 @@ module hci_core_source
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else
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assign addr_misaligned_push.data = {{(ADDR_OFFSET_BYTE-ADDR_OFFSET){1'b0}}, addr_pop.data[ADDR_OFFSET-1:0]};
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assign addr_misaligned_push.strb = '1;
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assign addr_misaligned_push.valid = enable_i & tcdm.gnt; // BEWARE: considered always ready!!!
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assign addr_misaligned_push.valid = enable_i & tcdm.req & tcdm.gnt; // check full handshake (req&gnt): hci_core_fifo plugs gnt to a ready, therefore gnt's may be asserted without a related req. BEWARE: pop considered always ready!!!
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assign addr_misaligned_pop.ready = (tcdm.r_valid | stream_valid_q) & resp_push.ready;
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assign addr_misaligned_q = addr_misaligned_pop.data[ADDR_OFFSET-1:0];
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rtl/core/hci_core_source_v2.sv

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -294,7 +294,7 @@ module hci_core_source_v2
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);
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assign addr_misaligned_push.data = {6'b0, addr_pop.data[1:0]};
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assign addr_misaligned_push.strb = '1;
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assign addr_misaligned_push.valid = enable_i & tcdm.req & tcdm.gnt; // BEWARE: considered always ready!!!
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assign addr_misaligned_push.valid = enable_i & tcdm.req & tcdm.gnt; // check full handshake (req&gnt): hci_core_fifo plugs gnt to a ready, therefore gnt's may be asserted without a related req. BEWARE: pop considered always ready!!!
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assign addr_misaligned_pop.ready = (tcdm.r_valid | stream_valid_q) & stream.ready;
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assign addr_misaligned_q = addr_misaligned_pop.data[1:0];
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