Add structure definitions for SoC GPIO and Timer0.TIM34

Author: ArcaneNibble

am1808.h

@@ -65,4 +65,72 @@
 // 30 = Shared RAM                  0x80nnnn00
 // 31 = mDDR/DDR2 Data              0xC0nnnn00
 
+// GPIO peripheral
+typedef struct hw_gpio {
+    uint32_t revid;
+    uint32_t _pad0;
+    uint32_t binten;
+    uint32_t _pad1;
+
+    uint32_t dir01;
+    uint32_t out_data01;
+    uint32_t set_data01;
+    uint32_t clr_data01;
+    uint32_t in_data01;
+    uint32_t set_ris_trig01;
+    uint32_t clr_ris_trig01;
+    uint32_t set_fal_trig01;
+    uint32_t clr_fal_trig01;
+    uint32_t intstat01;
+
+    uint32_t dir23;
+    uint32_t out_data23;
+    uint32_t set_data23;
+    uint32_t clr_data23;
+    uint32_t in_data23;
+    uint32_t set_ris_trig23;
+    uint32_t clr_ris_trig23;
+    uint32_t set_fal_trig23;
+    uint32_t clr_fal_trig23;
+    uint32_t intstat23;
+
+    uint32_t dir45;
+    uint32_t out_data45;
+    uint32_t set_data45;
+    uint32_t clr_data45;
+    uint32_t in_data45;
+    uint32_t set_ris_trig45;
+    uint32_t clr_ris_trig45;
+    uint32_t set_fal_trig45;
+    uint32_t clr_fal_trig45;
+    uint32_t intstat45;
+
+    uint32_t dir67;
+    uint32_t out_data67;
+    uint32_t set_data67;
+    uint32_t clr_data67;
+    uint32_t in_data67;
+    uint32_t set_ris_trig67;
+    uint32_t clr_ris_trig67;
+    uint32_t set_fal_trig67;
+    uint32_t clr_fal_trig67;
+    uint32_t intstat67;
+
+    uint32_t dir8;
+    uint32_t out_data8;
+    uint32_t set_data8;
+    uint32_t clr_data8;
+    uint32_t in_data8;
+    uint32_t set_ris_trig8;
+    uint32_t clr_ris_trig8;
+    uint32_t set_fal_trig8;
+    uint32_t clr_fal_trig8;
+    uint32_t intstat8;
+} hw_gpio;
+_Static_assert(sizeof(hw_gpio) == 0xd8);
+static volatile hw_gpio * const GPIO = (volatile hw_gpio *)0x01E26000;
+
+// Timer0 peripheral (only what we need)
+static volatile uint32_t * const TIMER0_TIM34 = (volatile uint32_t *)0x01C20014;
+
 #endif