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@ArcaneNibble ArcaneNibble commented Jul 29, 2025

This implements a FSM-based software I2C driver for the sensor ports.

This makes sure that function calls which need to spill registers works.
@ArcaneNibble ArcaneNibble force-pushed the i2c branch 2 times, most recently from a190cb8 to c16d2c2 Compare August 6, 2025 14:33
@ArcaneNibble ArcaneNibble requested a review from dlech August 6, 2025 21:12
@ArcaneNibble ArcaneNibble marked this pull request as ready for review August 6, 2025 21:14
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What are the stats on IRAM and DRAM usage?

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What are the stats on IRAM and DRAM usage?

0x580 (1408 decimal) bytes IRAM, 0x50 (80 decimal) bytes DRAM

There's plenty of room left.

This makes it much easier to keep the projects in sync.
This prevents a data race which can corrupt the pin state.
The I2C controller code will need access to the real address,
but we keep around the fake one to improve codegen for the other code.
@ArcaneNibble ArcaneNibble force-pushed the i2c branch 2 times, most recently from 8449841 to 475631a Compare August 7, 2025 02:01
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Ninja fix -- status or flags

Otherwise still ready for re-review.

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LGTM. Just one very minor suggestion.

*TIMER2_INTCTLSTAT = TIMER_INTCTLSTAT_PRDINTSTAT12;

// This code runs at 20 kHz, which is 2x the I2C clock rate
handle_i2c(&SHARED->i2c[0], &i2c_states[0]);
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Just curious why SHARED_HACK doesn't work here. Because of the additional array indexing? Or are we at an offset beyond what the optimized instruction can handle?

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The special lbco/sbco opcodes only work when you actually load/store through the constant table address. They can't be used to compute an effective address (no equivalent of x86 opcode LEA). The only way to get this address is to actually load it as an immediate, in which case we need the real value.

This driver implements I2C on the EV3 sensor ports for use with NXT and
third-party peripherals.
@ArcaneNibble ArcaneNibble merged commit 7b9b4f8 into main Aug 7, 2025
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3 participants