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jw14812mcb30
jw14812
authored and
mcb30
committed
[tg3] Use updated DMA APIs
Replace malloc_phys with dma_alloc, free_phys with dma_free, alloc_iob with alloc_rx_iob, free_iob with free_rx_iob, virt_to_bus with dma or iob_dma. Replace dma_addr_t with physaddr_t. Signed-off-by: Joseph Wong <joseph.wong@broadcom.com>
1 parent 4906a25 commit 409747f

3 files changed

Lines changed: 84 additions & 47 deletions

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‎src/drivers/net/tg3/tg3.c‎

Lines changed: 55 additions & 29 deletions
Original file line numberDiff line numberDiff line change
@@ -39,11 +39,13 @@ static void tg3_refill_prod_ring(struct tg3 *tp);
3939
#define TG3_RX_STD_RING_BYTES(tp) \
4040
(sizeof(struct tg3_rx_buffer_desc) * TG3_RX_STD_MAX_SIZE_5700)
4141

42-
void tg3_rx_prodring_fini(struct tg3_rx_prodring_set *tpr)
42+
void tg3_rx_prodring_fini(struct tg3 __unused *tp,
43+
struct tg3_rx_prodring_set *tpr)
4344
{ DBGP("%s\n", __func__);
4445

4546
if (tpr->rx_std) {
46-
free_phys(tpr->rx_std, TG3_RX_STD_RING_BYTES(tp));
47+
dma_free(&tpr->rx_std_map, tpr->rx_std,
48+
TG3_RX_STD_RING_BYTES(tp));
4749
tpr->rx_std = NULL;
4850
}
4951
}
@@ -56,24 +58,23 @@ static void tg3_free_consistent(struct tg3 *tp)
5658
{ DBGP("%s\n", __func__);
5759

5860
if (tp->tx_ring) {
59-
free_phys(tp->tx_ring, TG3_TX_RING_BYTES);
61+
dma_free(&tp->tx_desc_map, tp->tx_ring, TG3_TX_RING_BYTES);
6062
tp->tx_ring = NULL;
6163
}
6264

6365
free(tp->tx_buffers);
6466
tp->tx_buffers = NULL;
6567

6668
if (tp->rx_rcb) {
67-
free_phys(tp->rx_rcb, TG3_RX_RCB_RING_BYTES(tp));
68-
tp->rx_rcb_mapping = 0;
69+
dma_free(&tp->rx_rcb_map, tp->rx_rcb,
70+
TG3_RX_RCB_RING_BYTES(tp));
6971
tp->rx_rcb = NULL;
7072
}
7173

72-
tg3_rx_prodring_fini(&tp->prodring);
74+
tg3_rx_prodring_fini(tp, &tp->prodring);
7375

7476
if (tp->hw_status) {
75-
free_phys(tp->hw_status, TG3_HW_STATUS_SIZE);
76-
tp->status_mapping = 0;
77+
dma_free(&tp->status_map, tp->hw_status, TG3_HW_STATUS_SIZE);
7778
tp->hw_status = NULL;
7879
}
7980
}
@@ -88,32 +89,32 @@ int tg3_alloc_consistent(struct tg3 *tp)
8889
struct tg3_hw_status *sblk;
8990
struct tg3_rx_prodring_set *tpr = &tp->prodring;
9091

91-
tp->hw_status = malloc_phys(TG3_HW_STATUS_SIZE, TG3_DMA_ALIGNMENT);
92+
tp->hw_status = dma_alloc(tp->dma, &tp->status_map,
93+
TG3_HW_STATUS_SIZE, TG3_DMA_ALIGNMENT);
9294
if (!tp->hw_status) {
9395
DBGC(tp->dev, "hw_status alloc failed\n");
9496
goto err_out;
9597
}
96-
tp->status_mapping = virt_to_bus(tp->hw_status);
9798

9899
memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
99100
sblk = tp->hw_status;
100101

101-
tpr->rx_std = malloc_phys(TG3_RX_STD_RING_BYTES(tp), TG3_DMA_ALIGNMENT);
102+
tpr->rx_std = dma_alloc(tp->dma, &tpr->rx_std_map,
103+
TG3_RX_STD_RING_BYTES(tp), TG3_DMA_ALIGNMENT);
102104
if (!tpr->rx_std) {
103105
DBGC(tp->dev, "rx prodring alloc failed\n");
104106
goto err_out;
105107
}
106-
tpr->rx_std_mapping = virt_to_bus(tpr->rx_std);
107108
memset(tpr->rx_std, 0, TG3_RX_STD_RING_BYTES(tp));
108109

109110
tp->tx_buffers = zalloc(sizeof(struct ring_info) * TG3_TX_RING_SIZE);
110111
if (!tp->tx_buffers)
111112
goto err_out;
112113

113-
tp->tx_ring = malloc_phys(TG3_TX_RING_BYTES, TG3_DMA_ALIGNMENT);
114+
tp->tx_ring = dma_alloc(tp->dma, &tp->tx_desc_map,
115+
TG3_TX_RING_BYTES, TG3_DMA_ALIGNMENT);
114116
if (!tp->tx_ring)
115117
goto err_out;
116-
tp->tx_desc_mapping = virt_to_bus(tp->tx_ring);
117118

118119
/*
119120
* When RSS is enabled, the status block format changes
@@ -124,10 +125,10 @@ int tg3_alloc_consistent(struct tg3 *tp)
124125

125126
tp->rx_rcb_prod_idx = &sblk->idx[0].rx_producer;
126127

127-
tp->rx_rcb = malloc_phys(TG3_RX_RCB_RING_BYTES(tp), TG3_DMA_ALIGNMENT);
128+
tp->rx_rcb = dma_alloc(tp->dma, &tp->rx_rcb_map,
129+
TG3_RX_RCB_RING_BYTES(tp), TG3_DMA_ALIGNMENT);
128130
if (!tp->rx_rcb)
129131
goto err_out;
130-
tp->rx_rcb_mapping = virt_to_bus(tp->rx_rcb);
131132

132133
memset(tp->rx_rcb, 0, TG3_RX_RCB_RING_BYTES(tp));
133134

@@ -182,7 +183,11 @@ static void tg3_rx_iob_free(struct io_buffer *iobs[], int i)
182183
if (iobs[i] == NULL)
183184
return;
184185

185-
free_iob(iobs[i]);
186+
/* RX iobufs were allocated via alloc_rx_iob() and are therefore
187+
* DMA-mapped through the platform DMA API; they must be released
188+
* via free_rx_iob() so the mapping is torn down.
189+
*/
190+
free_rx_iob(iobs[i]);
186191
iobs[i] = NULL;
187192
}
188193

@@ -302,7 +307,7 @@ static int tg3_transmit(struct net_device *dev, struct io_buffer *iob)
302307

303308
struct tg3 *tp = dev->priv;
304309
u32 len, entry;
305-
dma_addr_t mapping;
310+
physaddr_t mapping;
306311

307312
if (tg3_tx_avail(tp) < 1) {
308313
DBGC(dev, "Transmit ring full\n");
@@ -312,7 +317,11 @@ static int tg3_transmit(struct net_device *dev, struct io_buffer *iob)
312317
entry = tp->tx_prod;
313318

314319
iob_pad(iob, ETH_ZLEN);
315-
mapping = virt_to_bus(iob->data);
320+
/* The netdevice core has already called iob_map_tx() for this
321+
* iobuf (because netdev->dma is set), so iob_dma() returns the
322+
* platform-translated bus address suitable for the device.
323+
*/
324+
mapping = iob_dma(iob);
316325
len = iob_len(iob);
317326

318327
tp->tx_buffers[entry].iob = iob;
@@ -366,12 +375,13 @@ static void tg3_tx_complete(struct net_device *dev)
366375
* buffers the cpu only reads the last cacheline of the RX descriptor
367376
* (to fetch the error flags, vlan tag, checksum, and opaque cookie).
368377
*/
369-
static int tg3_alloc_rx_iob(struct tg3_rx_prodring_set *tpr, u32 dest_idx_unmasked)
378+
static int tg3_alloc_rx_iob(struct tg3 *tp, struct tg3_rx_prodring_set *tpr,
379+
u32 dest_idx_unmasked)
370380
{ DBGP("%s\n", __func__);
371381

372382
struct tg3_rx_buffer_desc *desc;
373383
struct io_buffer *iob;
374-
dma_addr_t mapping;
384+
physaddr_t mapping;
375385
int dest_idx, iob_idx;
376386

377387
dest_idx = dest_idx_unmasked & (TG3_RX_STD_MAX_SIZE_5700 - 1);
@@ -382,15 +392,19 @@ static int tg3_alloc_rx_iob(struct tg3_rx_prodring_set *tpr, u32 dest_idx_unmask
382392
*
383393
* Callers depend upon this behavior and assume that
384394
* we leave everything unchanged if we fail.
395+
*
396+
* Allocate the receive iobuf already DMA-mapped through the
397+
* platform DMA API so the device may write into it under
398+
* preboot DMA protection (IOMMU).
385399
*/
386-
iob = alloc_iob(TG3_RX_STD_DMA_SZ);
400+
iob = alloc_rx_iob(TG3_RX_STD_DMA_SZ, tp->dma);
387401
if (iob == NULL)
388402
return -ENOMEM;
389403

390404
iob_idx = dest_idx % TG3_DEF_RX_RING_PENDING;
391405
tpr->rx_iobufs[iob_idx] = iob;
392406

393-
mapping = virt_to_bus(iob->data);
407+
mapping = iob_dma(iob);
394408

395409
desc->addr_hi = ((u64)mapping >> 32);
396410
desc->addr_lo = ((u64)mapping & 0xffffffff);
@@ -408,7 +422,7 @@ static void tg3_refill_prod_ring(struct tg3 *tp)
408422

409423
while (tpr->rx_std_iob_cnt < TG3_DEF_RX_RING_PENDING) {
410424
if (tpr->rx_iobufs[idx % TG3_DEF_RX_RING_PENDING] == NULL) {
411-
if (tg3_alloc_rx_iob(tpr, idx) < 0) {
425+
if (tg3_alloc_rx_iob(tp, tpr, idx) < 0) {
412426
DBGC(tp->dev, "alloc_iob() failed for descriptor %d\n", idx);
413427
break;
414428
}
@@ -532,22 +546,24 @@ static struct net_device_operations tg3_netdev_ops = {
532546

533547
#define TEST_BUFFER_SIZE 0x2000
534548

535-
int tg3_do_test_dma(struct tg3 *tp, u32 __unused *buf, dma_addr_t buf_dma, int size, int to_device);
549+
int tg3_do_test_dma(struct tg3 *tp, u32 __unused *buf, physaddr_t buf_dma, int size, int to_device);
536550
void tg3_read_mem(struct tg3 *tp, u32 off, u32 *val);
537551

538552
static int tg3_test_dma(struct tg3 *tp)
539553
{ DBGP("%s\n", __func__);
540554

541-
dma_addr_t buf_dma;
555+
struct dma_mapping buf_map;
556+
physaddr_t buf_dma;
542557
u32 *buf;
543558
int ret = 0;
544559

545-
buf = malloc_phys(TEST_BUFFER_SIZE, TG3_DMA_ALIGNMENT);
560+
memset(&buf_map, 0, sizeof(buf_map));
561+
buf = dma_alloc(tp->dma, &buf_map, TEST_BUFFER_SIZE, TG3_DMA_ALIGNMENT);
546562
if (!buf) {
547563
ret = -ENOMEM;
548564
goto out_nofree;
549565
}
550-
buf_dma = virt_to_bus(buf);
566+
buf_dma = dma(&buf_map, buf);
551567
DBGC2(tp->dev, "dma test buffer, virt: %p phys: %#016lx\n", buf, buf_dma);
552568

553569
if (tg3_flag(tp, 57765_PLUS)) {
@@ -709,7 +725,7 @@ static int tg3_test_dma(struct tg3 *tp)
709725
}
710726

711727
out:
712-
free_phys(buf, TEST_BUFFER_SIZE);
728+
dma_free(&buf_map, buf, TEST_BUFFER_SIZE);
713729
out_nofree:
714730
return ret;
715731
}
@@ -742,6 +758,16 @@ static int tg3_init_one(struct pci_device *pdev)
742758
tp->rx_mode = TG3_DEF_RX_MODE;
743759
tp->tx_mode = TG3_DEF_TX_MODE;
744760

761+
/* Configure DMA. This must be done before any DMA allocation
762+
* (including the self-test buffer in tg3_test_dma) so that
763+
* buffers are mapped through the platform DMA implementation,
764+
* which is required when preboot DMA protection (IOMMU) is
765+
* active.
766+
*/
767+
tp->dma = &pdev->dma;
768+
dev->dma = tp->dma;
769+
dma_set_mask_64bit ( tp->dma );
770+
745771
/* Subsystem IDs are required later */
746772
pci_read_config_word(tp->pdev, PCI_SUBSYSTEM_VENDOR_ID, &tp->subsystem_vendor);
747773
pci_read_config_word(tp->pdev, PCI_SUBSYSTEM_ID, &tp->subsystem_device);

‎src/drivers/net/tg3/tg3.h‎

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2809,8 +2809,6 @@ struct tg3_hw_stats {
28092809
u8 __reserved4[0xb00-0x9c8];
28102810
};
28112811

2812-
typedef unsigned long dma_addr_t;
2813-
28142812
/* 'mapping' is superfluous as the chip does not write into
28152813
* the tx/rx post rings so we could just fetch it from there.
28162814
* But the cache behavior is better how we are doing it now.
@@ -2954,7 +2952,7 @@ struct tg3_rx_prodring_set {
29542952
u32 rx_std_iob_cnt;
29552953
struct tg3_rx_buffer_desc *rx_std;
29562954
struct io_buffer *rx_iobufs[TG3_DEF_RX_RING_PENDING];
2957-
dma_addr_t rx_std_mapping;
2955+
struct dma_mapping rx_std_map;
29582956
};
29592957

29602958
#define TG3_IRQ_MAX_VECS_RSS 5
@@ -3090,6 +3088,7 @@ struct tg3 {
30903088
void *regs;
30913089
struct net_device *dev;
30923090
struct pci_device *pdev;
3091+
struct dma_device *dma;
30933092

30943093
u32 msg_enable;
30953094

@@ -3125,9 +3124,9 @@ struct tg3 {
31253124
struct tg3_tx_buffer_desc *tx_ring;
31263125
struct ring_info *tx_buffers;
31273126

3128-
dma_addr_t status_mapping;
3129-
dma_addr_t rx_rcb_mapping;
3130-
dma_addr_t tx_desc_mapping;
3127+
struct dma_mapping status_map;
3128+
struct dma_mapping rx_rcb_map;
3129+
struct dma_mapping tx_desc_map;
31313130
/* end tg3_napi */
31323131

31333132
/* begin "everything else" cacheline(s) section */
@@ -3371,7 +3370,7 @@ static inline void _tg3_flag_clear(enum TG3_FLAGS flag, unsigned long *bits)
33713370

33723371
/* tg3_main.c forward declarations */
33733372
int tg3_init_rings(struct tg3 *tp);
3374-
void tg3_rx_prodring_fini(struct tg3_rx_prodring_set *tpr);
3373+
void tg3_rx_prodring_fini(struct tg3 *tp, struct tg3_rx_prodring_set *tpr);
33753374
///int tg3_rx_prodring_init(struct tg3 *tp, struct tg3_rx_prodring_set *tpr);
33763375

33773376
/* tg3_phy.c forward declarations */
@@ -3390,7 +3389,7 @@ int tg3_get_invariants(struct tg3 *tp);
33903389
void tg3_init_bufmgr_config(struct tg3 *tp);
33913390
int tg3_get_device_address(struct tg3 *tp);
33923391
int tg3_halt(struct tg3 *tp);
3393-
void tg3_set_txd(struct tg3 *tp, int entry, dma_addr_t mapping, int len, u32 flags);
3392+
void tg3_set_txd(struct tg3 *tp, int entry, physaddr_t mapping, int len, u32 flags);
33943393
void tg3_set_power_state_0(struct tg3 *tp);
33953394
int tg3_alloc_consistent(struct tg3 *tp);
33963395
int tg3_init_hw(struct tg3 *tp, int reset_phy);

‎src/drivers/net/tg3/tg3_hw.c‎

Lines changed: 22 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1765,7 +1765,7 @@ static void __tg3_set_coalesce(struct tg3 *tp)
17651765
}
17661766

17671767
static void tg3_set_bdinfo(struct tg3 *tp, u32 bdinfo_addr,
1768-
dma_addr_t mapping, u32 maxlen_flags,
1768+
physaddr_t mapping, u32 maxlen_flags,
17691769
u32 nic_addr)
17701770
{ DBGP("%s\n", __func__);
17711771

@@ -1790,6 +1790,7 @@ static void tg3_rings_reset(struct tg3 *tp)
17901790

17911791
int i;
17921792
u32 txrcb, rxrcb, limit;
1793+
physaddr_t status_dma;
17931794

17941795
/* Disable all transmit rings but the first. */
17951796
if (!tg3_flag(tp, 5705_PLUS))
@@ -1844,14 +1845,20 @@ static void tg3_rings_reset(struct tg3 *tp)
18441845
/* Clear status block in ram. */
18451846
memset(tp->hw_status, 0, TG3_HW_STATUS_SIZE);
18461847

1847-
/* Set status block DMA address */
1848+
/* Set status block DMA address. Use dma() so the platform DMA
1849+
* implementation (e.g. EFI PCI_IO Map) can translate the host
1850+
* virtual address into the bus address the device must use.
1851+
*/
1852+
status_dma = dma(&tp->status_map, tp->hw_status);
1853+
18481854
tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_HIGH,
1849-
((u64) tp->status_mapping >> 32));
1855+
((u64) status_dma >> 32));
18501856
tw32(HOSTCC_STATUS_BLK_HOST_ADDR + TG3_64BIT_REG_LOW,
1851-
((u64) tp->status_mapping & 0xffffffff));
1857+
((u64) status_dma & 0xffffffff));
18521858

18531859
if (tp->tx_ring) {
1854-
tg3_set_bdinfo(tp, txrcb, tp->tx_desc_mapping,
1860+
tg3_set_bdinfo(tp, txrcb,
1861+
dma(&tp->tx_desc_map, tp->tx_ring),
18551862
(TG3_TX_RING_SIZE <<
18561863
BDINFO_FLAGS_MAXLEN_SHIFT),
18571864
NIC_SRAM_TX_BUFFER_DESC);
@@ -1860,7 +1867,8 @@ static void tg3_rings_reset(struct tg3 *tp)
18601867

18611868
/* FIXME: will TG3_RX_RET_MAX_SIZE_5705 work on all cards? */
18621869
if (tp->rx_rcb) {
1863-
tg3_set_bdinfo(tp, rxrcb, tp->rx_rcb_mapping,
1870+
tg3_set_bdinfo(tp, rxrcb,
1871+
dma(&tp->rx_rcb_map, tp->rx_rcb),
18641872
TG3_RX_RET_MAX_SIZE_5705 <<
18651873
BDINFO_FLAGS_MAXLEN_SHIFT, 0);
18661874
rxrcb += TG3_BDINFO_SIZE;
@@ -1900,6 +1908,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
19001908
u32 val, rdmac_mode;
19011909
int i, err, limit;
19021910
struct tg3_rx_prodring_set *tpr = &tp->prodring;
1911+
physaddr_t rx_std_dma;
19031912

19041913
tg3_stop_fw(tp);
19051914

@@ -2123,10 +2132,13 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy)
21232132
* The size of each ring is fixed in the firmware, but the location is
21242133
* configurable.
21252134
*/
2135+
rx_std_dma = dma(&tpr->rx_std_map, tpr->rx_std);
2136+
21262137
tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_HIGH,
2127-
((u64) tpr->rx_std_mapping >> 32));
2138+
((u64) rx_std_dma >> 32));
21282139
tw32(RCVDBDI_STD_BD + TG3_BDINFO_HOST_ADDR + TG3_64BIT_REG_LOW,
2129-
((u64) tpr->rx_std_mapping & 0xffffffff));
2140+
((u64) rx_std_dma & 0xffffffff));
2141+
21302142
if (!tg3_flag(tp, 5717_PLUS))
21312143
tw32(RCVDBDI_STD_BD + TG3_BDINFO_NIC_ADDR,
21322144
NIC_SRAM_RX_BUFFER_DESC);
@@ -2581,7 +2593,7 @@ int tg3_init_hw(struct tg3 *tp, int reset_phy)
25812593
}
25822594

25832595
void tg3_set_txd(struct tg3 *tp, int entry,
2584-
dma_addr_t mapping, int len, u32 flags)
2596+
physaddr_t mapping, int len, u32 flags)
25852597
{ DBGP("%s\n", __func__);
25862598

25872599
struct tg3_tx_buffer_desc *txd = &tp->tx_ring[entry];
@@ -2592,7 +2604,7 @@ void tg3_set_txd(struct tg3 *tp, int entry,
25922604
txd->vlan_tag = 0;
25932605
}
25942606

2595-
int tg3_do_test_dma(struct tg3 *tp, u32 __unused *buf, dma_addr_t buf_dma, int size, int to_device)
2607+
int tg3_do_test_dma(struct tg3 *tp, u32 __unused *buf, physaddr_t buf_dma, int size, int to_device)
25962608
{ DBGP("%s\n", __func__);
25972609

25982610
struct tg3_internal_buffer_desc test_desc;

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