diff --git a/src/qiskit_quimb/gate.py b/src/qiskit_quimb/gate.py
index 23b042f..0194572 100644
--- a/src/qiskit_quimb/gate.py
+++ b/src/qiskit_quimb/gate.py
@@ -9,7 +9,6 @@
 # that they have been altered from the originals.
 from __future__ import annotations
 
-import math
 from collections.abc import Iterator, Sequence
 from typing import Any, Callable
 
@@ -191,12 +190,16 @@ def _(op: Instruction, qubits: Sequence[int], kwargs: dict[str, Any]):
     return quimb.tensor.Gate("X", params=[], qubits=qubits, **kwargs)
 
 
+@_register_gate_func("xx_minus_yy")
+def _(op: Instruction, qubits: Sequence[int], kwargs: dict[str, Any]):
+    theta, beta = op.params
+    return quimb.tensor.Gate("XXMINUSYY", params=[theta, beta], qubits=qubits, **kwargs)
+
+
 @_register_gate_func("xx_plus_yy")
 def _(op: Instruction, qubits: Sequence[int], kwargs: dict[str, Any]):
     theta, beta = op.params
-    return quimb.tensor.Gate(
-        "GIVENS2", params=[0.5 * theta, beta + 0.5 * math.pi], qubits=qubits, **kwargs
-    )
+    return quimb.tensor.Gate("XXPLUSYY", params=[theta, beta], qubits=qubits, **kwargs)
 
 
 @_register_gate_func("y")
diff --git a/tests/circuit_test.py b/tests/circuit_test.py
index 84bcc8b..de943ba 100644
--- a/tests/circuit_test.py
+++ b/tests/circuit_test.py
@@ -40,6 +40,7 @@
     U2Gate,
     U3Gate,
     XGate,
+    XXMinusYYGate,
     XXPlusYYGate,
     YGate,
     ZGate,
@@ -62,6 +63,9 @@ def test_quimb_circuit():
     circuit.append(XXPlusYYGate(rng.uniform(-10, 10), rng.uniform(-10, 10)), [b, c])
     circuit.append(XXPlusYYGate(rng.uniform(-10, 10), rng.uniform(-10, 10)), [a, b])
     circuit.append(XXPlusYYGate(rng.uniform(-10, 10), rng.uniform(-10, 10)), [c, d])
+    circuit.append(XXMinusYYGate(rng.uniform(-10, 10), rng.uniform(-10, 10)), [b, c])
+    circuit.append(XXMinusYYGate(rng.uniform(-10, 10), rng.uniform(-10, 10)), [a, b])
+    circuit.append(XXMinusYYGate(rng.uniform(-10, 10), rng.uniform(-10, 10)), [c, d])
     circuit.append(CPhaseGate(rng.uniform(-10, 10)), [b, c])
     circuit.append(CPhaseGate(rng.uniform(-10, 10)), [a, b])
     circuit.append(CPhaseGate(rng.uniform(-10, 10)), [c, d])