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Addition call_graph inconsistent with decomposition for registers with unequal bitsizes #1818

@kjm538

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@kjm538

The number of cnots in the call graph for the Add bloq doesn't account for when a_bitsize < b_bitsize. In the decomposition, there is a cnot yielded conditioned on a_bitsize=b_bitsize

if len(input_bits) == len(output_bits):
yield CNOT().on(input_bits[-1], output_bits[-1])

but the call graph always includes this gate in the count
n_cnot = (n - 2) * 6 + 3

This results in different gate counts depending on what level of decomposition you count. For example

from qualtran.bloqs.arithmetic import Add
a_dtype = QUInt(2)
b_dtype = QUInt(3)
gate = Add(a_dtype=a_dtype,b_dtype=b_dtype)
gate.t_complexity() == gate.decompose_bloq().t_complexity()

returns False.

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