Generalize chips specs for higher order objects more thoroughly.

There were a couple places in the data structure definitions that
hardcoded assumptions about the order of the objects (to <1):

* The length of the OBJECTS vector in a CHIP-SPEC.
* The length of the CXNS vector in a HARDWARE-OBJECT.
* Various constructors and initializers for building complete chip
specifications.

To solve this problem we introduce more general abstractions that
cover the use case of building a chip-specification, as well as making
on-demand adjustable vectors for those whose lengths depend on the
order of the objects.

Author: karlosz

benchmarking/package.lisp

@@ -16,7 +16,6 @@
                 chip-spec-live-qubit-cc
                 chip-specification
                 chip-specification-objects
-                hardware-object-cxns
                 make-memory-descriptor
                 pragma-end-commuting-blocks
                 pragma-end-block

benchmarking/rewiring-analysis.lisp

@@ -29,28 +29,21 @@
 (defun init-chip (&key (architecture ':cz))
   "Initialize a chip from a given architecture with no objects"
   (let ((chip-spec (quil::make-chip-specification
-                    :objects (vector (quil::make-adjustable-vector)
-                                     (quil::make-adjustable-vector))
                     :generic-rewriting-rules (coerce (quil::global-rewriting-rules) 'vector))))
     (quil::install-generic-compilers chip-spec architecture)
     chip-spec))
 
+;;; FIXME: Duplicate of BUILD-CHIP-FROM-DIGRAPH
 (defun make-graph-chip (graph &key (architecture ':cz))
   "Make a chip from a graph"
-  (let* ((chip-spec (init-chip :architecture architecture))
-         (qubits
-           (loop :for i :below (length graph) :collect (quil::build-qubit i :type '(:RZ :X/2 :MEASURE))))
-         (qubit-array (make-array (length graph) :initial-contents qubits))
-         (links
-           (loop
-             :for (a . b) :in (graph-edges graph)
-             :for link-index :from 0
-             :collect (quil::build-link a b :type architecture)
-             :do (vector-push-extend link-index (quil::vnth 1 (quil::hardware-object-cxns (aref qubit-array a))))
-             :do (vector-push-extend link-index (quil::vnth 1 (quil::hardware-object-cxns (aref qubit-array b)))))))
-    (setf (quil::chip-specification-objects chip-spec)
-          (make-array 2 :initial-contents (list qubit-array
-                                                (coerce links 'vector))))
+  (let ((chip-spec (init-chip :architecture architecture)))
+    (loop :for i :below (length graph)
+          :do (quil::adjoin-hardware-object
+               (quil::build-qubit i :type '(:RZ :X/2 :MEASURE))
+               chip-spec))
+    (loop
+      :for (a . b) :in (graph-edges graph)
+      :do (quil::install-link-onto-chip chip-spec a b :architecture architecture))
     (quil:warm-hardware-objects chip-spec)))
 
 ;; 0 -- 1

boondoggle/src/producers.lisp

@@ -120,7 +120,7 @@ PARAMETER-BOUNDS is a list of maximum random values for the gate parameters."
                                      "This gate spec expects higher order hardware objects to exist.")
                              (elt (quil::chip-specification-objects chip-specification) gate-order)))
                          (device-index (random (length available-devices))))
-                    (quil::vnth 0 (quil::hardware-object-cxns (quil::vnth device-index available-devices)))))
+                    (quil::objects-on-hardware-object 0 (quil::vnth device-index available-devices))))
                  (t
                   (assert (< gate-order qubits-on-device)
                           nil

src/addresser/addresser-common.lisp

@@ -469,11 +469,11 @@ If DRY-RUN, this returns T as soon as it finds an instruction it can handle."
 
       (loop
         :for (candidate-hardware-index candidate-instr) :in instrs
-        :for physical-qubits := (coerce (vnth 0
-                                              (hardware-object-cxns
-                                               (chip-spec-hw-object chip-spec (1- (length (application-arguments
-                                                                                           candidate-instr)))
-                                                                    candidate-hardware-index)))
+        :for physical-qubits := (coerce (objects-on-hardware-object
+                                         0
+                                         (chip-spec-hw-object chip-spec (1- (length (application-arguments
+                                                                                     candidate-instr)))
+                                                              candidate-hardware-index))
                                         'list)
 
         :for candidate-cost := (cost-function state :instr candidate-instr)

src/addresser/addresser-state.lisp

@@ -144,7 +144,7 @@ INSTR is the \"active instruction\".
     (loop :for link :across  (chip-spec-links chip-spec)
           :for value := (funcall link-cost link)
           :do (destructuring-bind (q0 q1)
-                  (coerce (vnth 0 (hardware-object-cxns link)) 'list)
+                  (coerce (objects-on-hardware-object 0 link) 'list)
                 (setf (aref dist q0 q1) value
                       (aref dist q1 q0) value)))
     ;; for each intermediate vertex...
@@ -178,7 +178,7 @@ INSTR is the \"active instruction\".
                 (let ((hw (vnth j order-list)))
                   (unless (hardware-object-dead-p hw)
                     (let* ((instr (apply #'anon-gate "FLEX" (random-special-unitary (expt 2 qubits))
-                                         (or (coerce (vnth 0 (hardware-object-cxns hw)) 'list)
+                                         (or (coerce (objects-on-hardware-object 0 hw) 'list)
                                              (list j))))
                            (instrs-decomposed (expand-to-native-instructions (list instr) chip-spec))
                            (instrs-compressed (if *compute-tight-recombination-bound*

src/addresser/astar-rewiring-search.lisp

@@ -70,7 +70,7 @@ index at a time, rather than one octet at a time."
 
 (defun next-swap-info (swap)
   (with-slots (link) swap
-    (destructuring-bind (q0 q1) (coerce (vnth 0 (hardware-object-cxns link)) 'list)
+    (destructuring-bind (q0 q1) (coerce (objects-on-hardware-object 0 link) 'list)
       ;; TODO: Eventually this should look up swap in the list. (See cost-function.lisp)
       (values
        (permutation-record-duration (vnth 0 (hardware-object-permutation-gates link)))

src/addresser/fidelity-addresser.lisp

@@ -53,7 +53,7 @@
            (subschedule (chip-contiguous-subschedule-from-last-instructions
                          (addresser-state-chip-schedule state)
                          (apply #'make-qubit-resource
-                                (coerce (vnth 0 (hardware-object-cxns hardware-object)) 'list))))
+                                (coerce (objects-on-hardware-object 0 hardware-object) 'list))))
            (preceding-fidelity
             (calculate-instructions-log-fidelity subschedule
                                                  (addresser-state-chip-specification state))))
@@ -205,7 +205,7 @@
          (swap (apply #'build-gate
                       (permutation-record-operator permutation-record)
                       '()
-                      (coerce (vnth 0 (hardware-object-cxns hardware-object)) 'list))))
+                      (coerce (objects-on-hardware-object 0 hardware-object) 'list))))
     (calculate-instructions-fidelity (expand-to-native-instructions (list swap) chip-spec) chip-spec)))
 
 (defmethod initialize-instance :after ((instance fidelity-addresser-state)

src/addresser/temporal-addresser.lisp

@@ -102,7 +102,7 @@
                           (chip-schedule-resource-carving-point
                            (addresser-state-chip-schedule state)
                            (apply #'make-qubit-resource
-                                  (coerce (vnth 0 (hardware-object-cxns hardware-object)) 'list))))))
+                                  (coerce (objects-on-hardware-object 0 hardware-object) 'list))))))
           (setf time (min time intelligent-bound)))
         time))))
 

src/chip/chip-reader.lisp

@@ -256,13 +256,12 @@
               (t
                (setf link (build-link q0 q1 :type '(:CZ)))))
             (when link
-              ;; notify the qubits that they're attached.
-              (dolist (qubit-index (list q0 q1))
-                (vector-push-extend link-index (chip-spec-links-on-qubit chip-spec qubit-index)))
+              (adjoin-hardware-object link chip-spec)
+              ;; set up the connections between the qubits and the links
+              (connect-hardware-objects chip-spec link (chip-spec-nth-qubit chip-spec q0))
+              (connect-hardware-objects chip-spec link (chip-spec-nth-qubit chip-spec q1))
               ;; store the descriptor in the link hardware-object for later reference
-              (setf (hardware-object-misc-data link) link-hash)
-              ;; and store the hardware-object into the chip specification
-              (vector-push-extend link (chip-spec-links chip-spec)))))))))
+              (setf (hardware-object-misc-data link) link-hash))))))))
 
 (defun load-specs-layer (chip-spec specs-hash)
   "Loads the \"specs\" layer into a chip-specification object."
@@ -375,8 +374,6 @@
                     (or (gethash "isa" hash-table)
                         (error 'missing-isa-layer-error))))
          (chip-spec (make-chip-specification
-                     :objects (make-array 2 :initial-contents (list (make-adjustable-vector)
-                                                                    (make-adjustable-vector)))
                      :generic-rewriting-rules (coerce (global-rewriting-rules) 'vector))))
     ;; set up the self-referential compilers
     (install-generic-compilers chip-spec (list ':cz))