Need for at least for Rock3A, Rock3C, and Rock5B device tree overlay to provide pps-gpio in order to use GPS modules with a PPS signal pin.
Application needs time source accurate to +-0.001 seconds that PPS of GPS module will more than be able to ensure. USB based GPS only able to provide accuracy of about +-0.1 seconds which is just fine for 99% of applications. Seismic applications need time source with at least +-0.001 seconds for 200 samples per second, and at least +-0.0005 seconds for 300 samples per second. 200 samples per second will allow seismic frequencies up to 20Hz to be recorded with minimum details, and 300 samples per second will allow seismic frequencies down to 30Hz to be recorded with minimum details. Minimum details means minimum details that Nyquist Sampling Theorem states needs to be at least factor of 2, but has real world seismic waves have been found need to be recorded at least by factor of 10, but ideally factor of 20. Noted sampling rates needed for broadband seismometers that are common are able to record to at least 50Hz. (implies at least 500 samples per second, ideally 1000 samples per second). Be very assured ADC code for such sample rates is written such that can sample at noted rates with drift on order of +-50 microseconds of required sample time using Raspberry P3B. Hence even smaller drifts to required sample time due to code controlling the sample rate timing. Ergo sample rate timing is not just simple delay that would incur drift of recorded sample vs required sample time.
Possible references to code that provides pps-gpio device tree overlay:
https://gist.github.com/mill1000/44172617640c9b66cf7cd682f8b8ba51
https://github.com/jgilje/pps-gpio-amlogic/blob/master/README.md
On the Raspberry Pi the overlay Device Tree Overlay takes a parameter for which pin will be connected to the PPS signal:
dtoverlay=pps-gpio,gpiopin=18
I understand this simple enter GPIO 40 Pin Header number my not be possible due to how Rockchip processors name/identify the number of the 40 pin GPIO header differently. I would expect the Device Tree Overlay to have commented code for each GPIO pin number for respective Rockchip processors GPIO name assigned to the respective GPIO 1-40 pin number so all the user needs to do is remove line start comment of the line that matches the GPIO 1-40 pin number labelled on the SBC as 1-40. That way it is easy for many not aware of or users can easily make error because users do no understand the Rockchip GPIO internal naming. Comments of respective GPIO pin number 1-40 for the Rockchip pin name allows all users to simply choose same GPIO 40 pin header pin number for and when change processor therefore keeping the same PPS pin assuming there is not a reason there is need to change PPS pin. In fact with various GPS Hats the PPS pin is hard assigned due to design of the GPS Hat where again being able to see in comments the GPIO pin number as comment for the Rockchip GPIO name again allows users to correctly know what line to remove line start comment.
Need for at least for Rock3A, Rock3C, and Rock5B device tree overlay to provide pps-gpio in order to use GPS modules with a PPS signal pin.
Application needs time source accurate to +-0.001 seconds that PPS of GPS module will more than be able to ensure. USB based GPS only able to provide accuracy of about +-0.1 seconds which is just fine for 99% of applications. Seismic applications need time source with at least +-0.001 seconds for 200 samples per second, and at least +-0.0005 seconds for 300 samples per second. 200 samples per second will allow seismic frequencies up to 20Hz to be recorded with minimum details, and 300 samples per second will allow seismic frequencies down to 30Hz to be recorded with minimum details. Minimum details means minimum details that Nyquist Sampling Theorem states needs to be at least factor of 2, but has real world seismic waves have been found need to be recorded at least by factor of 10, but ideally factor of 20. Noted sampling rates needed for broadband seismometers that are common are able to record to at least 50Hz. (implies at least 500 samples per second, ideally 1000 samples per second). Be very assured ADC code for such sample rates is written such that can sample at noted rates with drift on order of +-50 microseconds of required sample time using Raspberry P3B. Hence even smaller drifts to required sample time due to code controlling the sample rate timing. Ergo sample rate timing is not just simple delay that would incur drift of recorded sample vs required sample time.
Possible references to code that provides pps-gpio device tree overlay:
https://gist.github.com/mill1000/44172617640c9b66cf7cd682f8b8ba51
https://github.com/jgilje/pps-gpio-amlogic/blob/master/README.md
On the Raspberry Pi the overlay Device Tree Overlay takes a parameter for which pin will be connected to the PPS signal:
dtoverlay=pps-gpio,gpiopin=18
I understand this simple enter GPIO 40 Pin Header number my not be possible due to how Rockchip processors name/identify the number of the 40 pin GPIO header differently. I would expect the Device Tree Overlay to have commented code for each GPIO pin number for respective Rockchip processors GPIO name assigned to the respective GPIO 1-40 pin number so all the user needs to do is remove line start comment of the line that matches the GPIO 1-40 pin number labelled on the SBC as 1-40. That way it is easy for many not aware of or users can easily make error because users do no understand the Rockchip GPIO internal naming. Comments of respective GPIO pin number 1-40 for the Rockchip pin name allows all users to simply choose same GPIO 40 pin header pin number for and when change processor therefore keeping the same PPS pin assuming there is not a reason there is need to change PPS pin. In fact with various GPS Hats the PPS pin is hard assigned due to design of the GPS Hat where again being able to see in comments the GPIO pin number as comment for the Rockchip GPIO name again allows users to correctly know what line to remove line start comment.