TDM4 on I2S3: frame clock (FCLK) at 48 kHz is not continuous (gaps/packetized output)

[truebest]

Hey everyone.

Summary
When running TDM4 on I2S3, playback works in some cases, but the frame clock (FCLK/FSYNC) at 48 kHz is not continuous. Instead of a stable 48 kHz clock, it appears in bursts (“packetized”) with brief pauses between packets. For my use case, a continuous, gap-free 48 kHz FCLK is required.

Environment

• Board: Raxda Zero 3W V1.11
• Kernel: 6.1.84.-12-rk2410-nocsf
• GPIO: GPIO3_A3", GPIO3_A4",ter "GPIO3_A5", "GPIO3_A6";

DTS Configuration

/dts-v1/;
/plugin/;

/ {
    metadata {
        title = "Enable I2S3 TDM4";
        compatible = "radxa,zero3";
        category = "audio";
        exclusive = "GPIO3_A3", "GPIO3_A4", "GPIO3_A5", "GPIO3_A6";
        description = "Enable I2S3 TDM4.";
    };
};

&i2s3_2ch {
    status = "okay";
    rockchip,bclk-fs = <128>;
    rockchip,clk-trcm = <1>;
    rockchip,playback-only;
    rockchip,playback-channels = <4>;
    //rockchip,i2s-broken-burst-len;
    //rockchip,grf = <0x16>;
    pinctrl-names = "default";
    pinctrl-0 = <&i2s3m0_sclk &i2s3m0_lrck &i2s3m0_sdi &i2s3m0_sdo>;
};

&{/} {
    sound {
        status = "okay";
        compatible = "simple-audio-card";
        simple-audio-card,name = "i2s3-tdm4";
        simple-audio-card,format = "dsp_a";
        simple-audio-card,mclk-fs = <256>;
        simple-audio-card,bitclock-master = <&cpu_dai>;
        simple-audio-card,frame-master = <&cpu_dai>;

        cpu_dai: simple-audio-card,cpu {
            sound-dai = <&i2s3_2ch>;
            system-clock-frequency = <12288000>;
            system-clock-direction = "out";
            dai-tdm-slot-num = <4>;
            dai-tdm-slot-width = <32>;
            dai-tdm-slot-tx-mask = <0xf>;
        };

        codec_dai: simple-audio-card,codec {
            sound-dai = <&tdm_dummy>;
        };
    };

    tdm_dummy: dummy-codec {
        #sound-dai-cells = <0>;
        compatible = "rockchip,dummy-codec";
        status = "okay";
    };
};

Evidence

Questions

• Is there a driver setting or DTS property to force continuous FCLK/FSYNC at 48 kHz?
• If not supported, what would be the recommended approach to modify the driver to keep the clock running continuously (e.g., gating policy, clocking mode, or DMA configuration)?
• Are there known workarounds (dummy DMA, keep-alive frames, different DAI format flags) for maintaining a stable 48 kHz frame clock on I2S3 in TDM4?

[truebest]

Hi.
I have some updates.

Issue 1 — bursts / “packetized” audio with players
When using ffmpeg/VLC/mpv I see underruns and the output comes in bursts:

underrun!!! (at least 6.606 ms long) rate=3072.2kbits/s speed=2.24x
This software trying to play it as expected, but because data out's faster, it mark underrun and make take some break.
But
With speaker-test the bit clocks are stable (no bursts), except one thing - it play faster than should.

Issue 2 — playback is exactly 2× too fast
speaker-test speaks “Front Left / Front Right …” at 2× speed.
I also generated a test tone and measured it on the speaker:

sox -n -r 48000 -b 32 -e signed-integer -c 4 t48_1k.wav synth 30 sine 1000
aplay -v -D default t48_1k.wav

The 1 kHz tone comes out as 2 kHz.

What I’ve verified
Hardware clocks on the pins: FCLK ≈ 48 kHz, BCLK ≈ 6.15 MHz (~48 k × 128).
During playback:

/proc/asound/card1/pcm0p/sub0/hw_params
access: MMAP_INTERLEAVED
format: S32_LE
channels: 4
rate: 48000 (48000/1)
period_size: 6000
buffer_size: 24000

Removing simple-audio-card,mclk-fs, system-clock-frequency, and system-clock-direction doesn’t change the behavior.

Changing rockchip,bclk-fs didn’t affect anything.

FCLK ≈ 48 kHz, BCLK ≈ 6.15 MHz as expected. I can see all 4 TDM slots occupied, and changing when speaker-test -c 4

Question

Why would audio play at 2x speed when FCLK is 48 kHz and BCLK ≈ 6.15 MHz on the scope?
It feels like the stream is being consumed at an effective 96 kHz (doubling), even though the hardware clocks look correct. Could there be a TDM framing/slot interpretation issue in the Rockchip i2s-tdm path for TDM4×32 (DSP_A) that causes 2-channel data to be packed/advanced as 4 slots? Any pointers on what to check (e.g., effective slots/slot_width/tx_mask in ASoC debugfs, known quirks, or DTS properties I should set differently) would be appreciated. Any idea?

Thanks!

[truebest]

So, since my DAC support TDM8 i started used it instead of TDM4. TDM8 works great out of the box without issues.

[CodeChenL]

Thank you for your detailed feedback. I will check it out when I have time.