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| 1 | +From f44c0d640f10125458ec3f65403b50cda607c49d Mon Sep 17 00:00:00 2001 |
| 2 | +From: Nikolai-L <nikolai.lyskov@realsenseai.com> |
| 3 | +Date: Sun, 1 Feb 2026 10:30:13 +0200 |
| 4 | +Subject: [PATCH] [PATCH] Add GPIO tunneling for the external sync support |
| 5 | + updating pipe setting functions for max9295 and max9296 drivers |
| 6 | + |
| 7 | +--- |
| 8 | + drivers/media/i2c/max9295.c | 11 +++++++++-- |
| 9 | + drivers/media/i2c/max9296.c | 11 +++++++++++ |
| 10 | + 2 files changed, 20 insertions(+), 2 deletions(-) |
| 11 | + |
| 12 | +diff --git a/drivers/media/i2c/max9295.c b/drivers/media/i2c/max9295.c |
| 13 | +index 4b03b1ef8..51e02edd7 100644 |
| 14 | +--- a/drivers/media/i2c/max9295.c |
| 15 | ++++ b/drivers/media/i2c/max9295.c |
| 16 | +@@ -34,6 +34,7 @@ |
| 17 | + #define MAX9295_CTRL0_ADDR 0x10 |
| 18 | + #define MAX9295_SRC_CTRL_ADDR 0x2BF |
| 19 | + #define MAX9295_SRC_PWDN_ADDR 0x02BE |
| 20 | ++#define MAX9295_2C0_ADDR 0x02C0 |
| 21 | + #define MAX9295_SRC_OUT_RCLK_ADDR 0x3F1 |
| 22 | + #define MAX9295_START_PIPE_ADDR 0x311 |
| 23 | + #define MAX9295_PIPE_EN_ADDR 0x2 |
| 24 | +@@ -94,7 +95,12 @@ |
| 25 | + |
| 26 | + #define MAX9295_RESET_ALL 0x80 |
| 27 | + #define MAX9295_RESET_SRC 0x60 |
| 28 | ++#define MAX9295_RESET_ESYNC 0x77 |
| 29 | ++ |
| 30 | + #define MAX9295_PWDN_GPIO 0x90 |
| 31 | ++#define MAX9295_PWDN_ESYNC 0x04 |
| 32 | ++ |
| 33 | ++#define MAX9295_2C0_ESYNC 0x57 |
| 34 | + |
| 35 | + #define MAX9295_MAX_PIPES 0x4 |
| 36 | + |
| 37 | +@@ -364,8 +370,9 @@ int max9295_setup_control(struct device *dev) |
| 38 | + max9295_write_reg(dev, MAX9295_I2C4_ADDR, (g_ctx->sdev_reg << 1)); |
| 39 | + max9295_write_reg(dev, MAX9295_I2C5_ADDR, (g_ctx->sdev_def << 1)); |
| 40 | + |
| 41 | +- max9295_write_reg(dev, MAX9295_SRC_PWDN_ADDR, MAX9295_PWDN_GPIO); |
| 42 | +- max9295_write_reg(dev, MAX9295_SRC_CTRL_ADDR, MAX9295_RESET_SRC); |
| 43 | ++ max9295_write_reg(dev, MAX9295_SRC_PWDN_ADDR, MAX9295_PWDN_ESYNC); |
| 44 | ++ max9295_write_reg(dev, MAX9295_SRC_CTRL_ADDR, MAX9295_RESET_ESYNC); |
| 45 | ++ max9295_write_reg(dev, MAX9295_2C0_ADDR, MAX9295_2C0_ESYNC); |
| 46 | + max9295_write_reg(dev, MAX9295_SRC_OUT_RCLK_ADDR, MAX9295_SRC_RCLK); |
| 47 | + |
| 48 | + g_ctx->serdev_found = true; |
| 49 | +diff --git a/drivers/media/i2c/max9296.c b/drivers/media/i2c/max9296.c |
| 50 | +index 87f9dcf7a..829657bca 100644 |
| 51 | +--- a/drivers/media/i2c/max9296.c |
| 52 | ++++ b/drivers/media/i2c/max9296.c |
| 53 | +@@ -26,6 +26,10 @@ |
| 54 | + #include <media/max9296.h> |
| 55 | + |
| 56 | + /* register specifics */ |
| 57 | ++#define MAX9296_2C5_ADDR 0x2C5 |
| 58 | ++#define MAX9296_2C6_ADDR 0x2C6 |
| 59 | ++#define MAX9296_2C7_ADDR 0x2C7 |
| 60 | ++ |
| 61 | + #define MAX9296_DST_CSI_MODE_ADDR 0x330 |
| 62 | + #define MAX9296_LANE_MAP1_ADDR 0x333 |
| 63 | + #define MAX9296_LANE_MAP2_ADDR 0x334 |
| 64 | +@@ -54,6 +58,10 @@ |
| 65 | + #define MAX9296_CTRL0_ADDR 0x10 |
| 66 | + |
| 67 | + /* data defines */ |
| 68 | ++#define MAX9296_2C5_ESYNC 0xAA |
| 69 | ++#define MAX9296_2C6_ESYNC 0x17 |
| 70 | ++#define MAX9296_2C7_ESYNC 0x47 |
| 71 | ++ |
| 72 | + #define MAX9296_CSI_MODE_4X2 0x1 |
| 73 | + #define MAX9296_CSI_MODE_2X4 0x4 |
| 74 | + #define MAX9296_LANE_MAP1_4X2 0x44 |
| 75 | +@@ -364,6 +372,9 @@ int max9296_setup_control(struct device *dev, struct device *s_dev) |
| 76 | + |
| 77 | + max9296_write_reg(dev, |
| 78 | + MAX9296_PWDN_PHYS_ADDR, MAX9296_ALLPHYS_NOSTDBY); |
| 79 | ++ max9296_write_reg(dev, MAX9296_2C5_ADDR, MAX9296_2C5_ESYNC); |
| 80 | ++ max9296_write_reg(dev, MAX9296_2C6_ADDR, MAX9296_2C6_ESYNC); |
| 81 | ++ max9296_write_reg(dev, MAX9296_2C7_ADDR, MAX9296_2C7_ESYNC); |
| 82 | + |
| 83 | + priv->sdev_ref++; |
| 84 | + |
| 85 | +-- |
| 86 | +2.43.0 |
| 87 | + |
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