Makefile.hvs_k70t.openxc7

# SPDX-License-Identifier: MIT
# Generated from https://github.com/FPGAOL-CE/caas-wizard

DB_DIR ?= /nextpnr-xilinx/xilinx/external/prjxray-db
CHIPDB ?= /chipdb

BUILDDIR := ${CURDIR}/build
TOP := pcie_7x_top_aximm_hvs_70t
#SOURCES :=  $(wildcard ./src/xilinx_pcie_mmcm.v)  $(wildcard ./src/axil_to_al.v)  $(wildcard ./src/axis_pcie_to_al_us.v)  $(wildcard ./src/pcie_7x.v)  $(wildcard ./src/pcie_axi_rx.v)  $(wildcard ./src/pcie_axi_tx.v)  $(wildcard ./src/pcie_block.v)  $(wildcard ./src/pcie_brams.v)  $(wildcard ./src/pcie_tx_thrtl_ctl.v)  $(wildcard ./src/pipe_wrapper_gtx.v)  $(wildcard ./src/aximm-minimal/pcie_7x_top_aximm_usdr.v)  $(wildcard ./src/aximm-minimal/pcie_7x_top_aximm.v)  $(wildcard ./src/aximm-minimal/axil_minimum.v) 
XDC := $(wildcard  $(wildcard ./pcie_7x_hvs_k70t.xdc) )

CHIPFAM := kintex7
PART := xc7k70tfbg676-1

LOGFILE := ${BUILDDIR}/top.log

all: ${CHIPDB} ${BUILDDIR} ${BUILDDIR}/top.bit

${BUILDDIR}:
	mkdir -m 777 -p ${BUILDDIR} && chown -R nobody ${BUILDDIR} | true

${CHIPDB}:
	mkdir -m 777 -p ${CHIPDB} && chown -R nobody ${CHIPDB} | true

# we run this in parent directory to seeminglessly import user source files
# otherwise have to parse user pattern and add ../
${BUILDDIR}/top.json:  $(wildcard ./src/xilinx_pcie_mmcm.v)  $(wildcard ./src/axil_to_al.v)  $(wildcard ./src/axis_pcie_to_al_us.v)  $(wildcard ./src/pcie_7x.v)  $(wildcard ./src/pcie_axi_rx.v)  $(wildcard ./src/pcie_axi_tx.v)  $(wildcard ./src/pcie_block.v)  $(wildcard ./src/pcie_brams.v)  $(wildcard ./src/pcie_tx_thrtl_ctl.v)  $(wildcard ./src/pipe_wrapper_gtx.v)  $(wildcard ./src/aximm-minimal/pcie_7x_top_aximm_hvs_70t.v)  $(wildcard ./src/aximm-minimal/pcie_7x_top_aximm.v)  $(wildcard ./src/aximm-minimal/axil_minimum.v) 
	/yosys/yosys -p "synth_xilinx -flatten -abc9 -arch xc7 -nosrl -top ${TOP}; write_json ${BUILDDIR}/top.json" $^ >> ${LOGFILE} 2>&1

# The chip database only needs to be generated once
# that is why we don't clean it with make clean
${CHIPDB}/${PART}.bin:
	pypy3 /nextpnr-xilinx/xilinx/python/bbaexport.py --device ${PART} --bba ${PART}.bba
	bbasm -l ${PART}.bba ${CHIPDB}/${PART}.bin
	rm -f ${PART}.bba

${BUILDDIR}/top.fasm: ${BUILDDIR}/top.json ${CHIPDB}/${PART}.bin
	nextpnr-xilinx --chipdb ${CHIPDB}/${PART}.bin --xdc ${XDC} --json ${BUILDDIR}/top.json --fasm $@ >> ${LOGFILE} 2>&1
	
${BUILDDIR}/top.frames: ${BUILDDIR}/top.fasm
	fasm2frames --part ${PART} --db-root ${DB_DIR}/${CHIPFAM} $< > $@ 2>> ${LOGFILE}

${BUILDDIR}/top.bit: ${BUILDDIR}/top.frames
	xc7frames2bit --part_file ${DB_DIR}/${CHIPFAM}/${PART}/part.yaml --part_name ${PART} --frm_file $< --output_file $@ >> ${LOGFILE} 2>&1

.PHONY: clean
clean:
	@rm -f *.bit
	@rm -f *.frames
	@rm -f *.fasm
	@rm -f *.json