esp32/RMT: let RMT decide mult-core allocation

Signed-off-by: Rick Sorensen <[email protected]>

Author: ricksorensen

ports/esp32/esp32_rmt.c

@@ -68,44 +68,6 @@ typedef struct _esp32_rmt_obj_t {
     mp_uint_t idle_level;
 } esp32_rmt_obj_t;
 
-#if MP_TASK_COREID == 0
-
-typedef struct _rmt_enable_state_t {
-    SemaphoreHandle_t handle;
-    rmt_channel_handle_t channel;
-    esp_err_t ret;
-} rmt_enable_state_t;
-
-static void rmt_enable_task(void *pvParameter) {
-    rmt_enable_state_t *state = pvParameter;
-    state->ret = rmt_enable(state->channel);
-    xSemaphoreGive(state->handle);
-    vTaskDelete(NULL);
-}
-
-// Call rmt_enable on core 1.  This ensures that the RMT interrupt handler is
-// serviced on core 1, so that WiFi (if active) does not interrupt it and cause glitches.
-esp_err_t rmt_enable_core1(rmt_channel_handle_t channel) {
-    TaskHandle_t th;
-    rmt_enable_state_t state;
-    state.handle = xSemaphoreCreateBinary();
-    state.channel = channel;
-    xTaskCreatePinnedToCore(rmt_enable_task, "rmt_enable_task", 2048 / sizeof(StackType_t), &state, ESP_TASK_PRIO_MIN + 1, &th, 1);
-    xSemaphoreTake(state.handle, portMAX_DELAY);
-    vSemaphoreDelete(state.handle);
-    return state.ret;
-}
-
-#else
-
-// MicroPython runs on core 1, so we can call the RMT installer directly and its
-// interrupt handler will also run on core 1.
-esp_err_t rmt_enable_core1(rmt_channel_handle_t channel) {
-    return rmt_enable(channel);
-}
-
-#endif
-
 static bool IRAM_ATTR esp32_rmt_tx_trans_done(rmt_channel_handle_t channel, const rmt_tx_done_event_data_t *edata, void *user_ctx) {
     esp32_rmt_obj_t *self = user_ctx;
     self->tx_ongoing -= 1;
@@ -357,7 +319,7 @@ static mp_obj_t esp32_rmt_write_pulses(size_t n_args, const mp_obj_t *args) {
     if (self->enabled) {
         rmt_tx_wait_all_done(self->channel, -1);
     } else {
-        check_esp_err(rmt_enable_core1(self->channel));
+        check_esp_err(rmt_enable(self->channel));
         self->enabled = true;
     }
 

ports/esp32/machine_bitstream.c

@@ -94,7 +94,7 @@ static void IRAM_ATTR machine_bitstream_high_low_bitbang(mp_hal_pin_obj_t pin, u
 // RMT implementation
 
 #if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5,3,0)
-#include "rmt_private.h" //RJS  need to add rmt_private path in _common.cmake
+#include "rmt_private.h"
 #endif
 #include "driver/rmt_tx.h"
 #include "driver/rmt_encoder.h"
@@ -112,7 +112,7 @@ static void machine_bitstream_high_low_rmt(mp_hal_pin_obj_t pin, uint32_t *timin
         .trans_queue_depth = 1,
     };
     check_esp_err(rmt_new_tx_channel(&tx_chan_config, &channel));
-    check_esp_err(rmt_enable_core1(channel));
+    check_esp_err(rmt_enable(channel));
 
     // Get the tick rate in kHz (this will likely be 40000).
     uint32_t counter_clk_khz = APB_CLK_FREQ / clock_div;
@@ -150,15 +150,16 @@ static void machine_bitstream_high_low_rmt(mp_hal_pin_obj_t pin, uint32_t *timin
     rmt_encoder_reset(encoder);
     check_esp_err(rmt_transmit(channel, encoder, buf, len, &tx_config));
 
-    check_esp_err(rmt_tx_wait_all_done(channel, -1));
+    // Wait until completion.
+    rmt_tx_wait_all_done(channel, -1);
 
     // Disable and release channel.
     check_esp_err(rmt_del_encoder(encoder));
     rmt_disable(channel);
 #if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5,3,0)
     channel->del(channel);
 #else
-    rmt_del_channel(channel);    // RJS untested
+    rmt_del_channel(channel);
 #endif
 
     // Cancel RMT output to GPIO pin.

ports/esp32/modesp32.h

@@ -66,6 +66,4 @@ extern const mp_obj_type_t esp32_partition_type;
 extern const mp_obj_type_t esp32_rmt_type;
 extern const mp_obj_type_t esp32_ulp_type;
 
-esp_err_t rmt_enable_core1(rmt_channel_handle_t channel);
-
 #endif // MICROPY_INCLUDED_ESP32_MODESP32_H