Docs: instruct how to view rewiring details after compilation

[mmmveggies]

From https://pyquil-docs.rigetti.com/en/stable/compiler.html#rewirings it's not clear how to view what rewiring happened:

the compiler emits comments at various points in the raw Quil code (which is not currently visible from a pyQuil Program object’s .out() method): # Entering rewiring and # Exiting rewiring.

This information is available though:

from pyquil import Program, get_qc

qc = get_qc("Ankaa-3")

program = Program("""
DECLARE ro BIT[1]
ISWAP 0 20
MEASURE 0 ro[0]
""")

native = qc.compiler.quil_to_native_quil(program)

native.native_quil_metadata

returning e.g.

NativeQuilMetadata { final_rewiring: [79, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 78, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 43, 44, 45, 46, 47, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 80, 81, 82, 83, 42, 48], gate_depth: Some(1), gate_volume: Some(1), multiqubit_gate_depth: Some(1), program_duration: Some(200.0), program_fidelity: Some(0.9951470300869136), topological_swaps: Some(0), qpu_runtime_estimation: Some(183.59100341796875) }

We should update the docs to guide users to see their rewiring results.