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youngaryoungar
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Add tests for the Svukte extension
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6 files changed

+589
-2
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‎riscof-plugins/rv64/spike_simple/riscof_spike_simple.py‎

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -110,6 +110,8 @@ def build(self, isa_yaml, platform_yaml):
110110
self.isa += 'c'
111111
if "V" in ispec["ISA"]:
112112
self.isa += 'v'
113+
if "H" in ispec["ISA"]:
114+
self.isa += 'h'
113115
if "Zicsr" in ispec["ISA"]:
114116
self.isa += '_Zicsr'
115117
if "Zicond" in ispec["ISA"]:
@@ -152,6 +154,8 @@ def build(self, isa_yaml, platform_yaml):
152154
self.isa += '_Zksh'
153155
if "Zksed" in ispec["ISA"]:
154156
self.isa += '_Zksed'
157+
if "Svukte" in ispec["ISA"]:
158+
self.isa += '_Svukte'
155159

156160
#TODO: The following assumes you are using the riscv-gcc toolchain. If
157161
# not please change appropriately

‎riscof-plugins/rv64/spike_simple/spike_simple_isa.yaml‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,11 +1,11 @@
11
hart_ids: [0]
22
hart0:
3-
ISA: RV64IMAFDCVSUZicboz_Zicsr_Zicond_Zifencei_Zimop_Zfa_Zfh_Zca_Zcb_Zcd_Zcmop_Zba_Zbb_Zbc_Zbkb_Zbkc_Zbkx_Zbs_Zknd_Zkne_Zknh_Zksh_Zksed
3+
ISA: RV64IMAFDCVSHUZicboz_Zicsr_Zicond_Zifencei_Zimop_Zfa_Zfh_Zca_Zcb_Zcd_Zcmop_Zba_Zbb_Zbc_Zbkb_Zbkc_Zbkx_Zbs_Zknd_Zkne_Zknh_Zksh_Zksed_Svukte
44
physical_addr_sz: 56
55
User_Spec_Version: '2.3'
66
supported_xlen: [64]
77
misa:
8-
reset-val: 0x800000000034112D
8+
reset-val: 0x80000000003411AD
99
rv32:
1010
accessible: false
1111
rv64:

‎riscv-test-suite/env/encoding.h‎

Lines changed: 23 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -63,6 +63,19 @@
6363
#define SSTATUS_UXL 0x0000000300000000
6464
#define SSTATUS64_SD 0x8000000000000000
6565

66+
#define HSTATUS_VSBE 0x00000020
67+
#define HSTATUS_GVA 0x00000040
68+
#define HSTATUS_SPV 0x00000080
69+
#define HSTATUS_SPVP 0x00000100
70+
#define HSTATUS_HU 0x00000200
71+
#define HSTATUS_VGEIN 0x0003f000
72+
#define HSTATUS_VTVM 0x00100000
73+
#define HSTATUS_VTW 0x00200000
74+
#define HSTATUS_VTSR 0x00400000
75+
#define HSTATUS_HUKTE 0x01000000
76+
#define HSTATUS_VSXL 0x0000000300000000
77+
#define HSTATUS_HUPMM 0x0003000000000000
78+
6679
#define DCSR_XDEBUGVER (3U<<30)
6780
#define DCSR_NDRESET (1<<29)
6881
#define DCSR_FULLRESET (1<<28)
@@ -143,6 +156,15 @@
143156
#define MENVCFGH_PBMTE 0x40000000
144157
#define MENVCFGH_STCE 0x80000000
145158

159+
#define SENVCFG_FIOM 0x00000001
160+
#define SENVCFG_LPE 0x00000004
161+
#define SENVCFG_SSE 0x00000008
162+
#define SENVCFG_CBIE 0x00000030
163+
#define SENVCFG_CBCFE 0x00000040
164+
#define SENVCFG_CBZE 0x00000080
165+
#define SENVCFG_UKTE 0x00000100
166+
#define SENVCFG_PMM 0x0000000300000000
167+
146168
#define PRV_U 0
147169
#define PRV_S 1
148170
#define PRV_H 2
@@ -835,6 +857,7 @@
835857
#define CSR_SIE 0x104
836858
#define CSR_STVEC 0x105
837859
#define CSR_SCOUNTEREN 0x106
860+
#define CSR_SENVCFG 0x10a
838861
#define CSR_SSCRATCH 0x140
839862
#define CSR_SEPC 0x141
840863
#define CSR_SCAUSE 0x142

‎riscv-test-suite/env/test_macros.h‎

Lines changed: 51 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -223,6 +223,15 @@ Mend_PMP: ;\
223223
add t2, t1, t0 ;\
224224
SREG t2, _REG_NAME##_bgn_off+1*sv_area_sz(sp) ;\
225225

226+
#define V_SAVE_AREA_SETUP(VVA, SVA, PA_LBL, _REG_NAME) ;\
227+
SAVE_AREA_SETUP(SVA, PA_LBL, _REG_NAME) ;\
228+
LI (t0, VVA) ;\
229+
LA (t1, PA_LBL) ;\
230+
sub t0, t0, t1 ;\
231+
LREG t1, _REG_NAME##_bgn_off+0*sv_area_sz(sp) ;\
232+
add t2, t1, t0 ;\
233+
SREG t2, _REG_NAME##_bgn_off+2*sv_area_sz(sp) ;\
234+
226235
#define PTE_SETUP_SV32(_PAR, _PR, _TR0, _TR1, _VAR, level) ;\
227236
.if (level==1) ;\
228237
LA(_TR1, rvtest_Sroot_pg_tbl) ;\
@@ -251,6 +260,25 @@ Mend_PMP: ;\
251260
add _TR1, _TR1, _TR0 /* Add index to page table base */ ;\
252261
SREG _PAR, 0(_TR1) /* Store PTE at calculated address */ ;\
253262

263+
#define V_PTE_SETUP_SV39(_PAR, _PR, _TR0, _TR1, VA, level) \
264+
srli _PAR, _PAR, 12 /* Shift PA right by 12 to get PPN */ ;\
265+
slli _PAR, _PAR, 10 /* Shift left by 10 to align PPN in PTE format */ ;\
266+
or _PAR, _PAR, _PR /* Combine PPN with permissions */ ;\
267+
.if (level==2) /* Level 2 (1GB superpage) */ ;\
268+
LA(_TR1, rvtest_Vroot_pg_tbl) /* Load root page table address */ ;\
269+
LI(_TR0, ((VA>>30)&0x1FF)<<3) /* Calculate index for LEVEL2 (bits 38:30) */ ;\
270+
.endif ;\
271+
.if (level==1) /* Level 1 (2MB superpage) */ ;\
272+
LA(_TR1, rvtest_vlvl2_pg_tbl) /* Load level 2 page table address */ ;\
273+
LI(_TR0, ((VA>>21)&0x1FF)<<3) /* Calculate index for LEVEL1 (bits 29:21) */ ;\
274+
.endif ;\
275+
.if (level==0) /* Level 0 (4KB page) */ ;\
276+
LA(_TR1, rvtest_vlvl1_pg_tbl) /* Load level 1 page table address */ ;\
277+
LI(_TR0, ((VA>>12)&0x1FF)<<3) /* Calculate index for LEVEL0 (bits 20:12) */ ;\
278+
.endif ;\
279+
add _TR1, _TR1, _TR0 /* Add index to page table base */ ;\
280+
SREG _PAR, 0(_TR1) /* Store PTE at calculated address */ ;\
281+
254282
// More Robust version of PTE_SETUP_SV39 to setup a PTE for a PA using VA
255283
// in a single line.
256284
// args: PA_LBL: Label of Physical Address, PERMS: permissions in hex
@@ -260,6 +288,11 @@ Mend_PMP: ;\
260288
LI(a1, PERMS) /* Load permissions into a1 */ ;\
261289
PTE_SETUP_SV39(a0, a1, t0, t1, VA, level) /* Call PTE_SETUP_SV39 macro */ ;\
262290

291+
#define V_PTE_SETUP_RV39_New(PA_LBL, PERMS, VA, level) \
292+
LA(a0, PA_LBL) /* Load physical address label into a0 */ ;\
293+
LI(a1, PERMS) /* Load permissions into a1 */ ;\
294+
PTE_SETUP_SV39(a0, a1, t0, t1, VA, level) /* Call PTE_SETUP_SV39 macro */ ;\
295+
263296
#define PTE_SETUP_SV48(_PAR, _PR, _TR0, _TR1, VA, level) ;\
264297
srli _PAR, _PAR, 12 /* Shift PA right by 12 to get PPN */ ;\
265298
slli _PAR, _PAR, 10 /* Shift left by 10 to align PPN in PTE format */ ;\
@@ -432,6 +465,24 @@ Mend_PMP: ;\
432465
or t6, t6, t5 ;\
433466
csrw satp, t6 ;
434467

468+
#define VSATP_SETUP_RV64(MODE) ;\
469+
LA(t6, rvtest_Vroot_pg_tbl) ;\
470+
.if (MODE == sv39) ;\
471+
LI(t5, (SATP64_MODE) & (SATP_MODE_SV39 << 60)) ;\
472+
.endif ;\
473+
.if (MODE == sv48) ;\
474+
LI(t5, (SATP64_MODE) & (SATP_MODE_SV48 << 60)) ;\
475+
.endif ;\
476+
.if (MODE == sv57) ;\
477+
LI(t5, (SATP64_MODE) & (SATP_MODE_SV57 << 60)) ;\
478+
.endif ;\
479+
.if (MODE == sv64) ;\
480+
LI(t5, (SATP64_MODE) & (SATP_MODE_SV64 << 60)) ;\
481+
.endif ;\
482+
srli t6, t6, 12 ;\
483+
or t6, t6, t5 ;\
484+
csrw vsatp, t6 ;
485+
435486
// macro to update the signature region for hints
436487
#define TEST_STORE_GPRS_AND_STATUS(sigptr) ;\
437488
/* Store all general-purpose registers (x0 to x31) to the signature region */ ;\

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