Mandate hardware support for misaligned access handling

[andreiw]

There's nothing in an ISA profile that mandates behavior (see riscv/riscv-profiles#187).

While the server platform requirements don't specifically have /performance/ targets (just like they don't about electricals, mechanicals, etc):

• The expected software stack ("server software stack" or "general purpose compute") comes from an environment where unaligned accesses penalty isn't in the range of 2-3 factors.
• the spec already mandates performance-oriented extensions like Svadu, which translates to a system with less "maintenance traps" taken to OS kernel.

Mandating hw support for unaligned accesses would obviously go a long stretch to reducing more of these "maintenance traps" to M or HS/VS modes (if delegated). We don't have to talk about the performance of the hw implementation (just like we don't elsewhere)

You could argue that this is unenforceable, but that depends what you mean:
a) an OS or format test suite can easily detect unaligned trap behavior (i.e. use FWFT to prevent M mode from handling, or just measure the performance like the code linked off of riscv/riscv-profiles#187 does... and IIRC Linux already attempts to detect this!)
b) formal certification, if that ever comes to pass, could be refused on the basis of any tests failing

This should, of course include vector, not just scalar accesses.