Added Qualcomm Microcontroller extensions (Xqci, Xqccmp)

We have added 17 extensions to the Microcontroller Integer Unit,
collectively referred to as Xqci extensions.

In addition we have added the Xqccmp extension with push/pop
and double move instructions.

The specifications are publicly available at
https://github.com/quic/riscv-unified-db/releases

The psABI with Qualcomm extensions is available at
https://github.com/quic/riscv-elf-psabi-quic-extensions

Support for these extensions in the LLVM toolchain is also in progress.

Change-Id: Ib2d94bec1a0a1abaeab5984bccfbb046122d0348

Author: apazos

src/toolchain-conventions.adoc

@@ -340,6 +340,7 @@ tag to provide extra relocations for a given vendor.
 |===
 |*Vendor*              |*Symbol*
 |Open Hardware Group   | COREV
+|Qualcomm              | QUALCOMM
 |===
 
 === List of vendor extensions
@@ -356,6 +357,24 @@ tag to provide extra relocations for a given vendor.
 |OpenHW  | Xcvmac          | 1.0.0          | https://github.com/openhwgroup/cv32e40p/blob/dev/docs/source/instruction_set_extensions.rst[CORE-V Instruction Set Extensions]
 |OpenHW  | Xcvmem          | 1.0.0          | https://github.com/openhwgroup/cv32e40p/blob/dev/docs/source/instruction_set_extensions.rst[CORE-V Instruction Set Extensions]
 |OpenHW  | Xcvsimd         | 1.0.0          | https://github.com/openhwgroup/cv32e40p/blob/dev/docs/source/instruction_set_extensions.rst[CORE-V Instruction Set Extensions]
+|Qualcomm | Xqcia          | 0.4.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqciac         | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcibi         | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcibm         | 0.4.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcicli        | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcicm         | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcics         | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcicsr        | 0.3.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqciint        | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcilb         | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcili         | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcilia        | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcilo         | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcilsm        | 0.4.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcisim        | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcisls        | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqcisync       | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
+|Qualcomm | Xqccmp         | 0.2.0          | https://github.com/quic/riscv-unified-db/releases[Qualcomm Microcontoller Extensions Specification]
 |SiFive  | XSFvqmaccdod    | 1.0            | https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification[SiFive Int8 Matrix Multiplication Extensions Specification]
 |SiFive  | XSFvqmaccqoq    | 1.0            | https://www.sifive.com/document-file/sifive-int8-matrix-multiplication-extensions-specification[SiFive Int8 Matrix Multiplication Extensions Specification]
 |SiFive  | XSFvfnrclipxfqf | 1.0            | https://www.sifive.com/document-file/fp32-to-int8-ranged-clip-instructions[FP32-to-int8 Ranged Clip Instructions (Xsfvfnrclipxfqf) Extension Specification]