Merge pull request #2166 from Steven-Li-Xiaogang/master

Fix VS-mode check for sireg* (really vsireg*) CSRs

Author: aswaterman

riscv/csrs.cc

@@ -1866,7 +1866,7 @@ void sscsrind_reg_csr_t::verify_permissions(insn_t insn, bool write) const {
   }
 
   if (proc->extension_enabled(EXT_SMCDELEG)) {
-    if (insn.csr() >= CSR_VSIREG && insn.csr() <= CSR_VSIREG6) {
+    if (address >= CSR_VSIREG && address <= CSR_VSIREG6) {
       if (!state->v) {
         // An attempt to access any vsireg* from M or S mode raises an illegal instruction exception.
         throw trap_illegal_instruction(insn.bits());
@@ -1884,7 +1884,7 @@ void sscsrind_reg_csr_t::verify_permissions(insn_t insn, bool write) const {
         }
       }
     }
-    if (insn.csr() >= CSR_SIREG && insn.csr() <= CSR_SIREG6) {
+    if (address >= CSR_SIREG && address <= CSR_SIREG6) {
       // attempts to access any sireg* when menvcfg.CDE = 0;
       if ((state->menvcfg->read() & MENVCFG_CDE) != MENVCFG_CDE) {
         if (!state->v) {