Will attempt write without read seed CSR raises an illegal-instruction exception in M mode?

[trdthg]

CSRRW when rd is x0 can do write without read.

Register operand

Instruction	rd is x0	rs1 is x0	Reads CSR	Writes CSR
CSRRW	Yes	-	No	Yes
CSRRW	No	-	Yes	Yes
CSRRS/CSRRC	-	Yes	Yes	No
CSRRS/CSRRC	-	No	Yes	Yes

Mode	sseed	useed	Description
M	*	*	The seed CSR is always available in machine mode as normal (with a CSR read-write instruction.) Attempted read without a write raises an illegal-instruction exception regardless of mode and access control bits.
U	*	0	Any seed CSR access raises an illegal-instruction exception.
U	*	1	The seed CSR is accessible as normal. No exception is raised for read-write.
S/HS	0	*	Any seed CSR access raises an illegal-instruction exception.
S/HS	1	*	The seed CSR is accessible as normal. No exception is raised for read-write.
VS/VU	0	*	Any seed CSR access raises an illegal-instruction exception.
VS/VU	1	*	A read-write seed access raises a virtual-instruction exception, while other access conditions raise an illegal-instruction exception.

Will attempt write without read seed CSR raises an illegal-instruction exception in M mode ?

[aswaterman]

The spec does not forbid write without read; it only forbids read without write.