Capture TPIDR register on Aarch64 and report it to the debugger.

Author: rocallahan

src/ExtraRegisters.cc

@@ -54,6 +54,9 @@ struct RegData {
 
   RegData(int offset = -1, int size = 0)
       : offset(offset), size(size), xsave_feature_bit(-1) {}
+  size_t end() const {
+    return offset + size;
+  }
 };
 
 static bool reg_in_range(GdbServerRegister regno, GdbServerRegister low, GdbServerRegister high,
@@ -259,7 +262,7 @@ static uint64_t* xsave_features(vector<uint8_t>& data) {
 
 size_t ExtraRegisters::read_register(uint8_t* buf, GdbServerRegister regno,
                                      bool* defined) const {
-  if (format_ == NT_FPR) {
+  if (format_ == AARCH64_FPR) {
     if (arch() != aarch64) {
       *defined = false;
       return 0;
@@ -290,12 +293,19 @@ size_t ExtraRegisters::read_register(uint8_t* buf, GdbServerRegister regno,
       memcpy(buf, &mask, sizeof(mask));
       return sizeof(mask);
 #endif
+    } else if (regno == DREG_TPIDR) {
+      reg_data = RegData(sizeof(ARM64Arch::user_fpsimd_state),
+                         sizeof(uint64_t));
+      if (reg_data.end() > data_.size()) {
+        *defined = false;
+        return 0;
+      }
     } else {
       *defined = false;
       return 0;
     }
 
-    DEBUG_ASSERT(size_t(reg_data.offset + reg_data.size) <= data_.size());
+    DEBUG_ASSERT(reg_data.end() <= data_.size());
     *defined = true;
     memcpy(buf, data_.data() + reg_data.offset, reg_data.size);
     return reg_data.size;
@@ -332,7 +342,7 @@ size_t ExtraRegisters::read_register(uint8_t* buf, GdbServerRegister regno,
 
 bool ExtraRegisters::write_register(GdbServerRegister regno, const void* value,
                                     size_t value_size) {
-  if (format_ == NT_FPR) {
+  if (format_ == AARCH64_FPR) {
     if (arch() != aarch64) {
       return false;
     }
@@ -538,7 +548,7 @@ void ExtraRegisters::print_register_file_compact(FILE* f) const {
       print_regs(*this, DREG_64_XMM0, DREG_64_YMM0H, 16, "ymm", f);
       break;
     case aarch64:
-      DEBUG_ASSERT(format_ == NT_FPR);
+      DEBUG_ASSERT(format_ == AARCH64_FPR);
       print_regs(*this, DREG_V0, GdbServerRegister(0), 32, "v", f);
       fputc(' ', f);
       print_reg(*this, DREG_FPSR, GdbServerRegister(0), "fpsr", f);
@@ -629,11 +639,11 @@ bool ExtraRegisters::set_to_raw_data(SupportedArch a, Format format,
 
   if (format == NONE) {
     return true;
-  } else if (format == NT_FPR) {
+  } else if (format == AARCH64_FPR) {
     if (!memcpy_fpr_regs_arch(a, data_, data, data_size)) {
       return false;
     }
-    format_ = NT_FPR;
+    format_ = AARCH64_FPR;
     return true;
   }
 
@@ -788,7 +798,7 @@ vector<uint8_t> ExtraRegisters::get_user_fpregs_struct(
       return to_vector(
           *reinterpret_cast<const X64Arch::user_fpregs_struct*>(data_.data()));
     case aarch64:
-      DEBUG_ASSERT(format_ == NT_FPR);
+      DEBUG_ASSERT(format_ == AARCH64_FPR);
       DEBUG_ASSERT(data_.size() == sizeof(ARM64Arch::user_fpregs_struct));
       return to_vector(
           *reinterpret_cast<const ARM64Arch::user_fpregs_struct*>(data_.data()));
@@ -816,7 +826,7 @@ void ExtraRegisters::set_user_fpregs_struct(Task* t, SupportedArch arch,
       memcpy(data_.data(), data, sizeof(X64Arch::user_fpregs_struct));
       return;
     case aarch64:
-      DEBUG_ASSERT(format_ == NT_FPR);
+      DEBUG_ASSERT(format_ == AARCH64_FPR);
       ASSERT(t, size >= sizeof(ARM64Arch::user_fpregs_struct));
       ASSERT(t, data_.size() >= sizeof(ARM64Arch::user_fpregs_struct));
       memcpy(data_.data(), data, sizeof(ARM64Arch::user_fpregs_struct));
@@ -890,7 +900,7 @@ void ExtraRegisters::reset() {
       memcpy(data_.data() + xinuse_offset, &xinuse, sizeof(xinuse));
     }
   } else {
-    DEBUG_ASSERT(format_ == NT_FPR);
+    DEBUG_ASSERT(format_ == AARCH64_FPR);
     DEBUG_ASSERT(arch() == aarch64 &&
       "Ensure that nothing is required here for your architecture.");
   }
@@ -953,7 +963,7 @@ void ExtraRegisters::compare_internal(const ExtraRegisters& reg2,
       compare_regs(*this, reg2, DREG_64_XMM0, avx_present ? DREG_64_YMM0H : NOT_PRESENT, 8, "ymm", result);
       break;
     case aarch64:
-      DEBUG_ASSERT(format_ == NT_FPR);
+      DEBUG_ASSERT(format_ == AARCH64_FPR);
       compare_regs(*this, reg2, DREG_V0, NOT_PRESENT, 32, "v", result);
       break;
     default:

src/ExtraRegisters.h

@@ -58,11 +58,12 @@ class ExtraRegisters {
    */
   XSAVE,
   /**
-   * Stores the content of the NT_FPREGS regset. The format depends on the
-   * architecture. It is given by Arch::user_fpregs_struct for the appropriate
-   * architecture.
+   * Stores the content of the NT_FPREGS regset for Aarch64.
+   * The first sizeof(ARM64Arch::user_fpregs_struct) bytes (or less) are
+   * a ARM64Arch::user_fpregs_struct.
+   * The next 8 bytes after that (if present) are TPIDR.
    */
-  NT_FPR };
+  AARCH64_FPR };
 
   // Set values from raw data, with the given XSAVE layout. Returns false
   // if this could not be done.

src/GdbServer.cc

@@ -2340,6 +2340,8 @@ const vector<GdbServerRegister>& GdbServer::target_registers(
       cpu_features & (1 << static_cast<uint8_t>(TargetFeature::AVX512));
   bool have_PAUTH =
       cpu_features & (1 << static_cast<uint8_t>(TargetFeature::PAuth));
+  bool have_TPIDR =
+      cpu_features & (1 << static_cast<uint8_t>(TargetFeature::Tls));
   switch (arch) {
     case x86: {
       add_range(GdbServerRegister(0), GdbServerRegister(DREG_ORIG_EAX));
@@ -2377,6 +2379,9 @@ const vector<GdbServerRegister>& GdbServer::target_registers(
     case aarch64:
       add_range(GdbServerRegister::DREG_X0,
                 GdbServerRegister::DREG_FPCR);
+      if (have_TPIDR) {
+        register_description.push_back(DREG_TPIDR);
+      }
       if (have_PAUTH) {
         register_description.push_back(DREG_PAUTH_DMASK);
         register_description.push_back(DREG_PAUTH_CMASK);

src/GdbServerRegister.h

@@ -320,6 +320,9 @@ enum GdbServerRegister {
   DREG_FPSR,
   DREG_FPCR,
 
+  // aarch64 TLS
+  DREG_TPIDR,
+
   // aarch64-pauth.xml
   DREG_PAUTH_DMASK,
   DREG_PAUTH_CMASK,

src/TargetDescription.cc

@@ -51,8 +51,19 @@ FeatureStream& operator<<(FeatureStream& stream, rr::SupportedArch arch) {
   return stream;
 }
 
+static const char* aarch64_tls_xml = R"(<feature name="org.gnu.gdb.aarch64.tls">
+  <reg name="tpidr" bitsize="64" type="data_ptr"/>
+</feature>
+)";
+
 template <>
 FeatureStream& operator<<(FeatureStream& stream, TargetFeature feature) {
+  if (feature == TargetFeature::Tls) {
+    DEBUG_ASSERT(!strcmp(stream.arch_prefix, "aarch64-"));
+    stream << aarch64_tls_xml;
+    return stream;
+  }
+
   DEBUG_ASSERT(stream.arch_prefix != nullptr &&
                "No architecture has been provided to description");
   stream << R"(  <xi:include href=")" << stream.arch_prefix;
@@ -84,6 +95,8 @@ FeatureStream& operator<<(FeatureStream& stream, TargetFeature feature) {
     case TargetFeature::PAuth:
       stream << "pauth.xml";
       break;
+    default:
+      CLEAN_FATAL() << "Unsupported feature";
   }
   stream << R"("/>)" << '\n';
   return stream;
@@ -123,10 +136,17 @@ static void get_x86_cpu_features(const TraceReader* trace,
 static void get_arm_cpu_features(const TraceReader* trace,
     vector<TargetFeature>& target_features) {
   bool pauth;
+  bool tpidr;
   if (trace != nullptr) {
     pauth = trace->aarch64_pauth();
+    tpidr = trace->aarch64_tpidr();
   } else {
     pauth = aarch64_pauth_enabled();
+    tpidr = true;
+  }
+
+  if (tpidr) {
+    target_features.push_back(TargetFeature::Tls);
   }
   if (pauth) {
     target_features.push_back(TargetFeature::PAuth);

src/TargetDescription.h

@@ -20,6 +20,7 @@ enum class TargetFeature : uint8_t {
   PKeys,
   FPU,
   PAuth,
+  Tls,
 };
 
 class TargetDescription {

src/Task.cc

@@ -1236,14 +1236,21 @@ const ExtraRegisters* Task::extra_regs_fallible() {
 #elif defined(__aarch64__)
     LOG(debug) << "  (refreshing extra-register cache using FPR)";
 
-    extra_registers.format_ = ExtraRegisters::NT_FPR;
-    extra_registers.data_.resize(sizeof(ARM64Arch::user_fpregs_struct));
+    extra_registers.format_ = ExtraRegisters::AARCH64_FPR;
+    extra_registers.data_.resize(sizeof(ARM64Arch::user_fpregs_struct)
+        + sizeof(uint64_t));
     struct iovec vec = { extra_registers.data_.data(),
-                          extra_registers.data_.size() };
+                         sizeof(ARM64Arch::user_fpregs_struct) };
     if (fallible_ptrace(PTRACE_GETREGSET, NT_PRFPREG, &vec)) {
       return nullptr;
     }
-    extra_registers.data_.resize(vec.iov_len);
+    memset(extra_registers.data_.data_.data() + vec.iov_len, 0,
+        extra_registers.data_.data() + extra_registers.data_.size());
+    vec = { extra_registers.data_.data() + sizeof(ARM64Arch::user_fpregs_struct),
+            sizeof(uint64_t) };
+    if (fallible_ptrace(PTRACE_GETREGSET, NT_ARM_TLS, &vec)) {
+      return nullptr;
+    }
 #else
 #error need to define new extra_regs support
 #endif
@@ -1807,9 +1814,9 @@ void Task::set_extra_regs(const ExtraRegisters& regs) {
       }
       break;
     }
-    case ExtraRegisters::NT_FPR: {
+    case ExtraRegisters::AARCH64_FPR: {
       struct iovec vec = { extra_registers.data_.data(),
-                            extra_registers.data_.size() };
+                           sizeof(ARM64Arch::user_fpsimd_state) };
       if (ptrace_if_stopped(PTRACE_SETREGSET, NT_PRFPREG, &vec)) {
         /* If that failed, the task was killed and it should not matter what
            we tried to set. But we will remember that our registers are dirty. */

src/TraceStream.cc

@@ -612,7 +612,7 @@ TraceFrame TraceReader::read_frame(FrameTime skip_before) {
         fmt = ExtraRegisters::XSAVE;
         break;
       case aarch64:
-        fmt = ExtraRegisters::NT_FPR;
+        fmt = ExtraRegisters::AARCH64_FPR;
         break;
     }
     bool ok = ret.recorded_extra_regs.set_to_raw_data(
@@ -1475,6 +1475,7 @@ void TraceWriter::close(CloseStatus status, const TraceUuid* uuid) {
   } else {
     auto aarch64_data = header.initAarch64();
     aarch64_data.setHasPAuth(aarch64_pauth_enabled());
+    aarch64_data.setHasTPIDR(true);
   }
 
   {
@@ -1711,6 +1712,7 @@ TraceReader::TraceReader(const string& dir)
   } else {
     auto aarch64_data = header.getAarch64();
     aarch64_pauth_ = aarch64_data.getHasPAuth();
+    aarch64_tpidr_ = aarch64_data.getHasTPIDR();
   }
 
   switch (header.getChaosMode()) {
@@ -1784,6 +1786,7 @@ TraceReader::TraceReader(const TraceReader& other)
   cpu_improperly_configured_known_ = other.cpu_improperly_configured_known_;
   cpu_improperly_configured_ = other.cpu_improperly_configured_;
   aarch64_pauth_ = other.aarch64_pauth_;
+  aarch64_tpidr_ = other.aarch64_tpidr_;
   exclusion_range_ = other.exclusion_range_;
   uname_ = other.uname_;
   quirks_ = other.quirks_;

src/TraceStream.h

@@ -512,6 +512,7 @@ class TraceReader : public TraceStream {
     return cpu_improperly_configured_;
   }
   bool aarch64_pauth() const { return aarch64_pauth_; }
+  bool aarch64_tpidr() const { return aarch64_tpidr_; }
 
   enum TraceQuirks {
     // Whether the /proc/<pid>/mem calls were explicitly recorded in this trace
@@ -556,6 +557,7 @@ class TraceReader : public TraceStream {
   bool cpu_improperly_configured_known_;
   bool cpu_improperly_configured_;
   bool aarch64_pauth_;
+  bool aarch64_tpidr_;
   uint32_t syscallbuf_fds_disabled_size_;
   uint32_t syscallbuf_hdr_size_;
   int required_forward_compatibility_version_;

src/rr_trace.capnp

@@ -109,6 +109,8 @@ struct Header {
   aarch64 :group {
     # True if the tracee had HWCAP_PACA
     hasPAuth @30 :Bool;
+    # True if the tracee recorded TPIDR
+    hasTPIDR @31 :Bool;
   }
   # These flags guard rr behavior differences that ensure old rr traces can
   # be successfully replayed on newer replayers