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[SPARC64] Decouple rs1 and rd in R_SPARC_TLS_GD_LO10 transform
The compiler might place the two values on different registers, so don't modify them during transforms.
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src/arch-sparc64.cc

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -358,12 +358,14 @@ void InputSection<E>::apply_reloc_alloc(Context<E> &ctx, u8 *base) {
358358
if (sym.has_tlsgd(ctx)) {
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*(ub32 *)loc |= bits(sym.get_tlsgd_addr(ctx) + A - GOT, 9, 0);
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} else if (sym.has_gottp(ctx)) {
361+
u32 rs1 = bits(*(ub32 *)loc, 18, 14);
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u32 rd = bits(*(ub32 *)loc, 29, 25);
362-
*(ub32 *)loc = 0x8010'2000 | (rd << 25) | (rd << 14); // or %reg, $0, %reg
363+
*(ub32 *)loc = 0x8010'2000 | (rd << 25) | (rs1 << 14); // or %rs1, $0, %rd
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*(ub32 *)loc |= bits(sym.get_gottp_addr(ctx) + A - GOT, 9, 0);
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} else {
366+
u32 rs1 = bits(*(ub32 *)loc, 18, 14);
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u32 rd = bits(*(ub32 *)loc, 29, 25);
366-
*(ub32 *)loc = 0x8018'2000 | (rd << 25) | (rd << 14); // xor %reg, $0, %reg
368+
*(ub32 *)loc = 0x8018'2000 | (rd << 25) | (rs1 << 14); // xor %rs1, $0, %rd
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*(ub32 *)loc |= bits(S + A - ctx.tp_addr, 9, 0) | 0b1'1100'0000'0000;
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}
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break;

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