add missing MMIO attributes

Author: robamu

cortex-m/src/peripheral/nvic.rs

@@ -31,6 +31,7 @@ pub struct RegisterBlock {
 
     /// Interrupt Active Bit (not present on Cortex-M0 variants)
     #[cfg(not(armv6m))]
+    #[mmio(PureRead)]
     iabr: [u32; 16],
     #[cfg(armv6m)]
     _reserved4: [u32; 16],
@@ -74,6 +75,7 @@ pub struct RegisterBlock {
 
     /// Software Trigger Interrupt
     #[cfg(not(armv6m))]
+    #[mmio(Write)]
     stir: u32,
 }