@@ -18,6 +18,7 @@ extern crate serde;
1818
1919use core:: convert:: TryFrom ;
2020use core:: marker:: PhantomData ;
21+ use core:: fmt:: Debug ;
2122
2223extern crate embedded_hal as hal;
2324use hal:: blocking:: delay;
@@ -234,10 +235,11 @@ where
234235 & mut self ,
235236 state : State ,
236237 ) -> Result < ( ) , Error < CommsError , PinError > > {
237- trace ! ( "Set state to: {:?}" , state) ;
238+ trace ! ( "Set state to: {:?} (0x{:02x}) " , state, state as u8 ) ;
238239 self . set_state ( state) ?;
239240 loop {
240241 let s = self . get_state ( ) ?;
242+ trace ! ( "Received: {:?}" , s) ;
241243 if state == s {
242244 break ;
243245 }
@@ -269,8 +271,8 @@ where
269271 self . set_state ( State :: Sleep ) ?;
270272 self . update_reg (
271273 regs:: Common :: OPMODE ,
272- device:: OPMODE_LONGRANGEMODE_MASK ,
273- device:: LongRangeMode :: Off as u8 ,
274+ device:: OPMODE_LONGRANGEMODE_MASK | device :: OPMODE_MODULATION_MASK ,
275+ device:: LongRangeMode :: Off as u8 | device :: ModulationType :: Fsk as u8 ,
274276 ) ?;
275277 }
276278 ModemMode :: LoRa => {
@@ -296,6 +298,8 @@ where
296298 ( channel >> 0 ) as u8 ,
297299 ] ;
298300
301+ debug ! ( "Set channel to index: {:?} (freq: {:?})" , channel, freq) ;
302+
299303 self . hal . write_regs ( regs:: Common :: FRFMSB as u8 , & outgoing) ?;
300304
301305 Ok ( ( ) )
@@ -317,6 +321,8 @@ where
317321 /// Calibrate the device RF chain
318322 /// This MUST be called directly after resetting the module
319323 pub ( crate ) fn rf_chain_calibration ( & mut self ) -> Result < ( ) , Error < CommsError , PinError > > {
324+ debug ! ( "Running calibration" ) ;
325+
320326 // Load initial PA config
321327 let frequency = self . get_frequency ( ) ?;
322328 let pa_config = self . read_reg ( regs:: Common :: PACONFIG ) ?;
@@ -332,6 +338,7 @@ where
332338 ) ?;
333339
334340 // Block on calibration complete
341+ // TODO: make this fallible with a timeout?
335342 while self . read_reg ( regs:: Fsk :: IMAGECAL ) ? & ( regs:: RF_IMAGECAL_IMAGECAL_RUNNING as u8 ) != 0
336343 {
337344 }
@@ -347,6 +354,7 @@ where
347354 ) ?;
348355
349356 // Block on calibration complete
357+ // TODO: make this fallible with a timeout?
350358 while self . read_reg ( regs:: Fsk :: IMAGECAL ) ? & ( regs:: RF_IMAGECAL_IMAGECAL_RUNNING as u8 ) != 0
351359 {
352360 }
@@ -355,6 +363,8 @@ where
355363 self . set_frequency ( frequency) ?;
356364 self . write_reg ( regs:: Common :: PACONFIG , pa_config) ?;
357365
366+ debug ! ( "Calibration done" ) ;
367+
358368 Ok ( ( ) )
359369 }
360370}
@@ -368,10 +378,6 @@ where
368378 hal,
369379 config,
370380 mode : Mode :: Unconfigured ,
371- #[ cfg( feature = "ffi" ) ]
372- c : None ,
373- #[ cfg( feature = "ffi" ) ]
374- err : None ,
375381 _ce : PhantomData ,
376382 _pe : PhantomData ,
377383 }
@@ -394,16 +400,22 @@ where
394400 /// Read a u8 value from the specified register
395401 pub fn read_reg < R > ( & mut self , reg : R ) -> Result < u8 , Error < CommsError , PinError > >
396402 where
397- R : Copy + Clone + Into < u8 > ,
403+ R : Copy + Clone + Debug + Into < u8 > ,
398404 {
399- self . hal . read_reg ( reg. into ( ) )
405+ let value = self . hal . read_reg ( reg. into ( ) ) ?;
406+
407+ trace ! ( "Read reg: {:?} (0x{:02x}): 0x{:02x}" , reg, reg. into( ) , value) ;
408+
409+ Ok ( value)
400410 }
401411
402412 /// Write a u8 value to the specified register
403413 pub fn write_reg < R > ( & mut self , reg : R , value : u8 ) -> Result < ( ) , Error < CommsError , PinError > >
404414 where
405- R : Copy + Clone + Into < u8 > ,
415+ R : Copy + Clone + Debug + Into < u8 > ,
406416 {
417+ trace ! ( "Write reg: {:?} (0x{:02x}): 0x{:02x}" , reg, reg. into( ) , value) ;
418+
407419 self . hal . write_reg ( reg. into ( ) , value)
408420 }
409421
@@ -415,8 +427,10 @@ where
415427 value : u8 ,
416428 ) -> Result < u8 , Error < CommsError , PinError > >
417429 where
418- R : Copy + Clone + Into < u8 > ,
430+ R : Copy + Clone + Debug + Into < u8 > ,
419431 {
432+ trace ! ( "Update reg: {:?} (0x{:02x}): 0x{:02x} (0x{:02x})" , reg, reg. into( ) , value, mask) ;
433+
420434 self . hal . update_reg ( reg. into ( ) , mask, value)
421435 }
422436}
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