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Description
The timing for CGA modes, 640x200 or 640x400 implemented with scan doubling, seems to be a bit off.
The picture on my VGA monitors appears to be shifted left significantly. On a couple of monitors I was able to adjust the horizontal position and bring the picture to middle of the screen, on my newer monitor, I cannot do that, even at minimal (rightmost) position, the picture appears to be shifted left and clipped
Are there settings in Verilog that I can adjust to change the timing?
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