phyrilog/spec_dict_schema.yaml at asap7_updates · sehuang/phyrilog · GitHub

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xwidth: "width of design"
ywidth: "height of design"
units: "units for GDS"
precision: "grid precision for GDS"
aspect_ratio: "desired aspect ratio given 1 or fewer width specs. Defining both xwidth and ywidth overrides this parameter"
input_side: "define side to put all input pins on. Default left side"
output_side: "define side to put all output pins on. Default right side"
pin_margin: "Should the design be flush with the first/last pins on each side (False) or not (True)?"
exclude_layers: "List of layers to exclude from BBOX"
pins:
  h_layer: "horizontal metal layer for pins"
  v_layer: "vertical metal layer for pins"
  pinA: # Script will automatically grab names from the keys here
    layer: "layer of pin shape"
    xwidth: "width of pin. default min track width for vert pin, 1um for horiz pin"
    ywidth: "height of pin. default min track width for horiz pin, 1um for vert pin"
    center: "center of pin"
    side: "side of design for pin. overrides general input/output side specification"
    range: "[A,B] range of bus bits which these specs apply to."
pg_pins:
  h_layer: "horizontal metal layer for pins"
  v_layer: "vertical metal layer for pins"
  pwr_pin:
    layer:
    xwidth:
    ywidth:
    center:
    side: