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151 | 151 | "CFG_I2C_ADDRESS": (0x20510001, U1), |
152 | 152 | "CFG_I2C_ENABLED": (0x10510003, L), |
153 | 153 | "CFG_I2C_EXTENDEDTIMEOUT": (0x10510002, L), |
| 154 | + "CFG_I2C_PULL_UPS_DISABLED": (0x1051000B, L), |
154 | 155 | "CFG_I2C_REMAP": (0x10510004, L), |
155 | 156 | "CFG_INFMSG_NMEA_I2C": (0x20920006, X1), |
156 | 157 | "CFG_INFMSG_NMEA_SPI": (0x2092000A, X1), |
|
977 | 978 | "CFG_NAV2_NAVSPG_ONLY_AUTHDATA": (0x10170003, L), |
978 | 979 | "CFG_NAV2_OUT_ENABLED": (0x10170001, L), |
979 | 980 | "CFG_NAV2_SBAS_USE_INTEGRITY": (0x10170002, L), |
| 981 | + "CFG_NAVCOR_ENABLE_GAL_HAS": (0x100D0002, L), |
| 982 | + "CFG_NAVCOR_ENABLE_HOST": (0x100D0001, L), |
980 | 983 | "CFG_NAVHPG_DGNSSMODE": (0x20140011, E1), |
981 | 984 | "CFG_NAVMASK_EL_MASK_000_020": (0x50180001, X8), |
982 | 985 | "CFG_NAVMASK_EL_MASK_020_040": (0x50180002, X8), |
|
1121 | 1124 | "CFG_RTCM_DF003_IN": (0x30090008, U2), |
1122 | 1125 | "CFG_RTCM_DF003_IN_FILTER": (0x20090009, E1), |
1123 | 1126 | "CFG_RTCM_DF003_OUT": (0x30090001, U2), |
| 1127 | + "CFG_RTCM_DF028_OUT": (0x30090010, U2), |
1124 | 1128 | "CFG_SBAS_ACCEPT_NOT_IN_PRNMASK": (0x30360008, X2), |
1125 | 1129 | "CFG_SBAS_PRNSCANMASK": (0x50360006, X8), |
1126 | 1130 | "CFG_SBAS_USE_DIFFCORR": (0x10360004, L), |
|
1203 | 1207 | "CFG_SIGNAL_PLAN": (0x2031003A, E1), |
1204 | 1208 | "CFG_SIGNAL_QZSS_ENA": (0x10310024, L), |
1205 | 1209 | "CFG_SIGNAL_QZSS_L1CA_ENA": (0x10310012, L), |
| 1210 | + "CFG_SIGNAL_QZSS_L1CB_ENA": (0x10310039, L), |
1206 | 1211 | "CFG_SIGNAL_QZSS_L1S_ENA": (0x10310014, L), |
1207 | 1212 | "CFG_SIGNAL_QZSS_L2C_ENA": (0x10310015, L), |
1208 | 1213 | "CFG_SIGNAL_QZSS_L5_ENA": (0x10310017, L), |
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