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Commit 8353355

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fix : ld1 & st1 rvv ZVFH
1 parent 8a1b4dc commit 8353355

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2 files changed

+8
-24
lines changed

2 files changed

+8
-24
lines changed

simde/arm/neon/ld1.h

+4-12
Original file line numberDiff line numberDiff line change
@@ -43,12 +43,8 @@ simde_vld1_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(4)]) {
4343
return vld1_f16(ptr);
4444
#else
4545
simde_float16x4_private r_;
46-
#if defined(SIMDE_RISCV_V_NATIVE)
47-
#if defined(SIMDE_ARCH_RISCV_ZVFH)
48-
r_.sv64 = __riscv_vle16_v_f16m1((_Float16 *)ptr , 4);
49-
#else
50-
simde_memcpy(&r_, ptr, 8);
51-
#endif
46+
#if defined(SIMDE_RISCV_V_NATIVE) && defined(SIMDE_ARCH_RISCV_ZVFH)
47+
r_.sv64 = __riscv_vle16_v_f16m1((_Float16 *)ptr , 4);
5248
#else
5349
simde_memcpy(&r_, ptr, sizeof(r_));
5450
#endif
@@ -269,12 +265,8 @@ simde_vld1q_f16(simde_float16_t const ptr[HEDLEY_ARRAY_PARAM(8)]) {
269265
simde_float16x8_private r_;
270266
#if defined(SIMDE_WASM_SIMD128_NATIVE)
271267
r_.v128 = wasm_v128_load(ptr);
272-
#elif defined(SIMDE_RISCV_V_NATIVE)
273-
#if defined(SIMDE_ARCH_RISCV_ZVFH)
274-
r_.sv128 = __riscv_vle16_v_f16m1((_Float16 *)ptr , 8);
275-
#else
276-
simde_memcpy(&r_, ptr, 16);
277-
#endif
268+
#elif defined(SIMDE_RISCV_V_NATIVE) && defined(SIMDE_ARCH_RISCV_ZVFH)
269+
r_.sv128 = __riscv_vle16_v_f16m1((_Float16 *)ptr , 8);
278270
#else
279271
simde_memcpy(&r_, ptr, sizeof(r_));
280272
#endif

simde/arm/neon/st1.h

+4-12
Original file line numberDiff line numberDiff line change
@@ -42,12 +42,8 @@ simde_vst1_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(4)], simde_float16x4_t val
4242
vst1_f16(ptr, val);
4343
#else
4444
simde_float16x4_private val_ = simde_float16x4_to_private(val);
45-
#if defined(SIMDE_RISCV_V_NATIVE)
46-
#if defined(SIMDE_ARCH_RISCV_ZVFH)
47-
__riscv_vse16_v_f16m1((_Float16 *)ptr , val_.sv64 , 4);
48-
#else
49-
simde_memcpy(ptr, &val_, 8);
50-
#endif
45+
#if defined(SIMDE_RISCV_V_NATIVE) && defined(SIMDE_ARCH_RISCV_ZVFH)
46+
__riscv_vse16_v_f16m1((_Float16 *)ptr , val_.sv64 , 4);
5147
#else
5248
simde_memcpy(ptr, &val_, sizeof(val_));
5349
#endif
@@ -258,12 +254,8 @@ simde_vst1q_f16(simde_float16_t ptr[HEDLEY_ARRAY_PARAM(8)], simde_float16x8_t va
258254

259255
#if defined(SIMDE_WASM_SIMD128_NATIVE)
260256
wasm_v128_store(ptr, val_.v128);
261-
#elif defined(SIMDE_RISCV_V_NATIVE)
262-
#if defined(SIMDE_ARCH_RISCV_ZVFH)
263-
__riscv_vse16_v_f16m1((_Float16 *)ptr , val_.sv128 , 8);
264-
#else
265-
simde_memcpy(ptr, &val_, 16);
266-
#endif
257+
#elif defined(SIMDE_RISCV_V_NATIVE) && defined(SIMDE_ARCH_RISCV_ZVFH)
258+
__riscv_vse16_v_f16m1((_Float16 *)ptr , val_.sv128 , 8);
267259
#else
268260
simde_memcpy(ptr, &val_, sizeof(val_));
269261
#endif

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