x86/clmul: allow VEX-encoded _mm256_clmulepi64_epi128 without AVX512VL

The Intel Intrinsics Guide lists VPCLMULQDQ + AVX512VL for
_mm256_clmulepi64_epi128, but that only describes the EVEX-encoded
form. The instruction also has a VEX.256 encoding which merely
requires VPCLMULQDQ + AVX, and compilers emit it when AVX-512 is not
enabled (GCC since 9.1 / PR target/88541, Clang since 10). Requiring
AVX512VL_NATIVE forced CPUs with VPCLMULQDQ but no AVX-512 -- notably
AMD Zen 3 -- onto the slow portable fallback.

Follow the pattern already used in gfni.h: use the native intrinsic
when AVX512VL is available, or when AVX is available without AVX512F
(the latter condition avoids compilers encoding the 256-bit form as
EVEX, which would require AVX512VL). The 512-bit intrinsic is
unchanged; ZMM has no VEX encoding.

Also fix the native alias guards to use OR instead of AND: an alias
must be defined whenever any required feature is missing, otherwise a
target with exactly one of the two features gets neither the native
definition nor the SIMDe alias and fails to compile under
SIMDE_ENABLE_NATIVE_ALIASES.

Author: fo40225

simde/x86/clmul.h

@@ -290,10 +290,10 @@ simde_mm256_clmulepi64_epi128 (simde__m256i a, simde__m256i b, const int imm8)
 
   return simde__m256i_from_private(r_);
 }
-#if defined(SIMDE_X86_VPCLMULQDQ_NATIVE) && defined(SIMDE_X86_AVX512VL_NATIVE)
+#if defined(SIMDE_X86_VPCLMULQDQ_NATIVE) && (defined(SIMDE_X86_AVX512VL_NATIVE) || (defined(SIMDE_X86_AVX_NATIVE) && !defined(SIMDE_X86_AVX512F_NATIVE)))
   #define simde_mm256_clmulepi64_epi128(a, b, imm8) _mm256_clmulepi64_epi128(a, b, imm8)
 #endif
-#if defined(SIMDE_X86_VPCLMULQDQ_ENABLE_NATIVE_ALIASES) && defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
+#if defined(SIMDE_X86_VPCLMULQDQ_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512VL_ENABLE_NATIVE_ALIASES)
   #undef _mm256_clmulepi64_epi128
   #define _mm256_clmulepi64_epi128(a, b, imm8) simde_mm256_clmulepi64_epi128(a, b, imm8)
 #endif
@@ -390,7 +390,7 @@ simde_mm512_clmulepi64_epi128 (simde__m512i a, simde__m512i b, const int imm8)
 #if defined(SIMDE_X86_VPCLMULQDQ_NATIVE) && defined(SIMDE_X86_AVX512F_NATIVE)
   #define simde_mm512_clmulepi64_epi128(a, b, imm8) _mm512_clmulepi64_epi128(a, b, imm8)
 #endif
-#if defined(SIMDE_X86_VPCLMULQDQ_ENABLE_NATIVE_ALIASES) && defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
+#if defined(SIMDE_X86_VPCLMULQDQ_ENABLE_NATIVE_ALIASES) || defined(SIMDE_X86_AVX512F_ENABLE_NATIVE_ALIASES)
   #undef _mm512_clmulepi64_epi128
   #define _mm512_clmulepi64_epi128(a, b, imm8) simde_mm512_clmulepi64_epi128(a, b, imm8)
 #endif