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INSTALL.md

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@@ -29,6 +29,8 @@ Values for `RELEASE` are as below:
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| FSF GCC 7 | `gcc7` |
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| FSF GCC 8 | `gcc8` |
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| FSF GCC 9 | `gcc8` |
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| FSF GCC 10 | `gcc8` |
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| FSF GCC 11 | `gcc11` |
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| GNAT GPL 2016 | `gcc6` |
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| GNAT GPL 2017 | `gnat-gpl-2017` |
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| GNAT CE 2018 | `gcc8` |

arduino-due/adainclude/_init.c

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@ Copyright (C) 2021 Free Software Foundation, Inc.
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@ This file is part of the Cortex GNAT RTS project. This file is
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@ free software; you can redistribute it and/or modify it under
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@ terms of the GNU General Public License as published by the Free
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@ Software Foundation; either version 3, or (at your option) any
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@ later version. This file is distributed in the hope that it will
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@ be useful, but WITHOUT ANY WARRANTY; without even the implied
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@ warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
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@ As a special exception under Section 7 of GPL version 3, you are
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@ granted additional permissions described in the GCC Runtime
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@ Library Exception, version 3.1, as published by the Free Software
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@ Foundation.
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@ You should have received a copy of the GNU General Public License
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@ and a copy of the GCC Runtime Library Exception along with this
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@ program; see the files COPYING3 and COPYING.RUNTIME respectively.
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@ If not, see <http://www.gnu.org/licenses/>.
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@ This is the Vector Table, described in 11057 23-mar-15, Chapter 10.6.4
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@ The capitalized handlers are defined in startup.adb, using
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@ weak symbols (they can't be defined here, unlike _fault, or
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@ the linker satisfies the requirement immediately).
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.syntax unified
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.cpu cortex-m4
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.thumb
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.text
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.section .isr_vector
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.align 2
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.global _isr_vector
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.type _isr_vector, %object
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37+
_isr_vector:
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/* Startup */
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.word _estack /* top of stack, from linker script. */
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.word program_initialization /* entry point */
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42+
/* Cortex-M core interrupts */
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.word _fault /* -14 NMI. */
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.word HardFault_Handler /* -13 Hard fault. */
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.word _fault /* -12 Mem manage. */
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.word _fault /* -11 Bus fault. */
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.word _fault /* -10 Usage fault. */
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.word _fault /* -9 reserved. */
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.word _fault /* -8 reserved. */
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.word _fault /* -7 reserved. */
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.word _fault /* -6 reserved. */
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.word SVC_Handler /* -5 SVCall. */
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.word _fault /* -4 Breakpoint. */
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.word _fault /* -3 reserved. */
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.word PendSV_Handler /* -2 PendSV. */
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.word SysTick_Handler /* -1 Systick. */
57+
58+
/* MCU interrupts */
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.rept 45 /* 0 .. 44, standard */
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.word IRQ_Handler
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.endr
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.size _isr_vector, . - _isr_vector
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.section .text
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67+
.thumb_func
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.type _fault, %function
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_fault: b _fault
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.size _fault, . - _fault
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arduino-due/adainclude/startup-set_up_clock.adb

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@@ -1,4 +1,4 @@
1-
-- Copyright (C) 2016, 2020 Free Software Foundation, Inc.
1+
-- Copyright (C) 2016-2021 Free Software Foundation, Inc.
22
--
33
-- This file is part of the Cortex GNAT RTS project. This file is
44
-- free software; you can redistribute it and/or modify it under
@@ -45,23 +45,27 @@ begin
4545
end;
4646

4747
-- Select the Main Clock
48-
PMC_Periph.CKGR_MOR := (KEY => 16#37#,
49-
MOSCXTEN => 1, -- main crystal oscillator enable
50-
MOSCRCEN => 1, -- main on-chip rc osc. enable
51-
MOSCXTST => 8, -- startup time
52-
others => <>);
53-
-- XXX shouldn't this give 4 MHz, not 12?
48+
declare
49+
CKGR_MOR : constant CKGR_MOR_Register :=
50+
(KEY => 16#37#,
51+
MOSCXTEN => 1, -- main crystal oscillator enable
52+
MOSCRCEN => 1, -- main on-chip rc osc. enable
53+
MOSCXTST => 8, -- startup time
54+
others => <>);
55+
-- XXX shouldn't this give 4 MHz, not 12?
56+
begin
57+
PMC_Periph.CKGR_MOR := CKGR_MOR;
58+
end;
5459

5560
-- Loop until stable
5661
loop
57-
exit when PMC_Periph.PMC_SR.MOSCXTS /= 0;
62+
exit when PMC_Periph.PMC_SR.MOSCXTS = 1;
5863
end loop;
5964

6065
-- Select the Main oscillator
6166
declare
62-
CKGR_MOR : CKGR_MOR_Register;
67+
CKGR_MOR : CKGR_MOR_Register := PMC_Periph.CKGR_MOR;
6368
begin
64-
CKGR_MOR := PMC_Periph.CKGR_MOR;
6569
CKGR_MOR.KEY := 16#37#;
6670
CKGR_MOR.MOSCSEL := 1;
6771
PMC_Periph.CKGR_MOR := CKGR_MOR;
@@ -73,18 +77,28 @@ begin
7377
end loop;
7478

7579
-- Disable PLLA (?hardware bugfix?)
76-
PMC_Periph.CKGR_PLLAR := (ONE => 1,
77-
MULA => 0,
78-
DIVA => 0,
79-
others => <>);
80+
declare
81+
CKGR_PLLAR : constant CKGR_PLLAR_Register :=
82+
(ONE => 1,
83+
MULA => 0,
84+
DIVA => 0,
85+
others => <>);
86+
begin
87+
PMC_Periph.CKGR_PLLAR := CKGR_PLLAR;
88+
end;
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8190
-- Set PLLA to multiply by 14, count 16#3f#, divide by 1 (=>
8291
-- enable PLL); Main Clock is 12 MHz, => 168 Mhz
83-
PMC_Periph.CKGR_PLLAR := (ONE => 1,
84-
MULA => 13, -- multipler - 1
85-
PLLACOUNT => 16#3f#,
86-
DIVA => 1,
87-
others => <>);
92+
declare
93+
CKGR_PLLAR : constant CKGR_PLLAR_Register :=
94+
(ONE => 1,
95+
MULA => 13, -- multipler - 1
96+
PLLACOUNT => 16#3f#,
97+
DIVA => 1,
98+
others => <>);
99+
begin
100+
PMC_Periph.CKGR_PLLAR := CKGR_PLLAR;
101+
end;
88102

89103
-- Loop until ready
90104
loop
@@ -95,16 +109,17 @@ begin
95109
PMC_MCKR : PMC_MCKR_Register;
96110
begin
97111
-- Select Main Clock, PRES 0 (no prescaling)
98-
PMC_Periph.PMC_MCKR := (CSS => Main_Clk,
99-
others => <>);
112+
PMC_MCKR := (CSS => MAIN_CLK,
113+
others => <>);
114+
PMC_Periph.PMC_MCKR := PMC_MCKR;
100115
-- Loop until ready
101116
loop
102117
exit when PMC_Periph.PMC_SR.MCKRDY /= 0;
103118
end loop;
104119

105120
-- Set PRES 8
106121
PMC_MCKR := PMC_Periph.PMC_MCKR;
107-
PMC_MCKR.PRES := Clk_8;
122+
PMC_MCKR.PRES := CLK_8;
108123
PMC_Periph.PMC_MCKR := PMC_MCKR;
109124
-- Loop until ready
110125
loop
@@ -115,7 +130,7 @@ begin
115130
-- Main_Clock above, as recommended
116131
-- Set PRES
117132
PMC_MCKR := PMC_Periph.PMC_MCKR;
118-
PMC_MCKR.PRES := Clk_2;
133+
PMC_MCKR.PRES := CLK_2;
119134
PMC_Periph.PMC_MCKR := PMC_MCKR;
120135
-- Loop until ready
121136
loop
@@ -124,7 +139,7 @@ begin
124139

125140
-- Set CSS
126141
PMC_MCKR := PMC_Periph.PMC_MCKR;
127-
PMC_MCKR.CSS := Plla_Clk;
142+
PMC_MCKR.CSS := PLLA_CLK;
128143
PMC_Periph.PMC_MCKR := PMC_MCKR;
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-- Loop until ready
130145
loop

arduino-due/adainclude/startup.adb

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@@ -1,4 +1,4 @@
1-
-- Copyright (C) 2016-2018 Free Software Foundation, Inc.
1+
-- Copyright (C) 2016-2021 Free Software Foundation, Inc.
22
--
33
-- This file is part of the Cortex GNAT RTS project. This file is
44
-- free software; you can redistribute it and/or modify it under
@@ -18,7 +18,6 @@
1818
-- program; see the files COPYING3 and COPYING.RUNTIME respectively.
1919
-- If not, see <http://www.gnu.org/licenses/>.
2020

21-
with Ada.Interrupts.Names;
2221
with Interfaces;
2322
with System.Machine_Code;
2423
with System.Parameters;
@@ -91,6 +90,8 @@ package body Startup is
9190
-- _edata: the first address after read/write data in SRAM
9291
-- _sbss: the start of BSS (to be initialized to zero)
9392
-- _ebss: the first address after BSS.
93+
--
94+
-- _isr_vector is set up in interrupt_vectors.s.
9495

9596
use System.Storage_Elements;
9697

@@ -154,28 +155,19 @@ package body Startup is
154155
System.FreeRTOS.Tasks.Start_Scheduler;
155156
end Program_Initialization;
156157

157-
-------------------------
158-
-- Interrupt vectors --
159-
-------------------------
158+
--------------------------
159+
-- Interrupt Handlers --
160+
--------------------------
160161

161-
-- Vector Table, 11057 23-Mar-15, Chapter 10.6.4
162+
-- The interrupt vector is set up in interrupt_vectors.s, using
163+
-- the handlers defined here.
162164

163-
procedure Dummy_Handler;
164-
procedure Dummy_Handler is
165-
IPSR : Interfaces.Unsigned_32
166-
with Volatile; -- don't want it to be optimised away
167-
begin
168-
System.Machine_Code.Asm
169-
("mrs %0, ipsr",
170-
Outputs => Interfaces.Unsigned_32'Asm_Output ("=r", IPSR),
171-
Volatile => True);
172-
loop
173-
null;
174-
end loop;
175-
end Dummy_Handler;
165+
-- These handlers are all defined as Weak so that they can be
166+
-- replaced by real handlers at link time.
176167

177-
-- The remaining handlers are all defined as Weak so that they can
178-
-- be replaced by real handlers at link time.
168+
-- If we defined the weak handlers in interrupt_vectors.s, the
169+
-- references would be satisfied internally and so couldn't be
170+
-- replaced by the real handler.
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180172
procedure HardFault_Handler
181173
with Export, Convention => Ada, External_Name => "HardFault_Handler";
@@ -187,6 +179,7 @@ package body Startup is
187179
end loop;
188180
end HardFault_Handler;
189181

182+
-- Provided by FreeRTOS.
190183
procedure SVC_Handler
191184
with Export, Convention => Ada, External_Name => "SVC_Handler";
192185
pragma Weak_External (SVC_Handler);
@@ -197,6 +190,7 @@ package body Startup is
197190
end loop;
198191
end SVC_Handler;
199192

193+
-- Provided by FreeRTOS.
200194
procedure PendSV_Handler
201195
with Export, Convention => Ada, External_Name => "PendSV_Handler";
202196
pragma Weak_External (PendSV_Handler);
@@ -207,6 +201,7 @@ package body Startup is
207201
end loop;
208202
end PendSV_Handler;
209203

204+
-- Provided by FreeRTOS.
210205
procedure SysTick_Handler
211206
with Export, Convention => Ada, External_Name => "SysTick_Handler";
212207
pragma Weak_External (SysTick_Handler);
@@ -235,23 +230,4 @@ package body Startup is
235230
end loop;
236231
end IRQ_Handler;
237232

238-
type Handler is access procedure;
239-
240-
Vectors : array (-14 .. Ada.Interrupts.Names.CAN1_IRQ) of Handler :=
241-
(-9 .. -6 | -4 .. -3 => null, -- reserved
242-
-14 => Dummy_Handler'Access, -- NMI
243-
-13 => HardFault_Handler'Access, -- HardFault
244-
-12 => Dummy_Handler'Access, -- MemManagement
245-
-11 => Dummy_Handler'Access, -- BusFault
246-
-10 => Dummy_Handler'Access, -- UsageFault
247-
-5 => SVC_Handler'Access, -- SVCall
248-
-2 => PendSV_Handler'Access, -- PendSV
249-
-1 => SysTick_Handler'Access, -- SysTick
250-
others => IRQ_Handler'Access)
251-
with
252-
Export,
253-
Convention => Ada,
254-
External_Name => "isr_vector";
255-
pragma Linker_Section (Vectors, ".isr_vector");
256-
257233
end Startup;

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