Design checklist

[gkasprow]

schematics:

• make sure a new sequencing circuit is implemented
• sequencing circuit controls SERVMOD pulldown line (power good signal)
• sequencing circuit must be re-set by the nRST line
• ESD strip resistors
• GA, RESETn, I2C, and SERVMOD lines must be protected with TVS diodes
• one needs to generate onboard P3V3MP from 12V (beware of LDO capacitors; not all LDOs like ceramic ones)
• I2C EEPROM access is controlled by SERVMOD line https://ohwr.org/project/diot/-/wikis/crate_monitoring#peripheral-boards-identification
• all of the above is implemented in this template design
• use DIOT clock (100/125MHz) when possible
• Don't modify the template files! (EEM_Connectors.SchDoc, CPCIS_Connectors_P1_P6.SchDoc)
• make EEM and DIOT variants

PCB:

• verify DIOT connectors positions
• verify panel position
• make sure ESD strip is exposed and connected with panel handle
• make sure chamfered edges are used
• make sure there are no components 3mm from edges
• make sure there are no traces on top/bottom 3mm from edges
• minimise stub lengths close to EEM connectors

[gkasprow]

New sequencing circuit

[gkasprow]

Feel free to modify the power supply unit, template has example 3.3V implementation
Keep the same structure, harness coloring as in the template file

[gkasprow]

PCB and schematic checklists
https://github.com/sinara-hw/sinara/wiki/PCBReviewChecklist?fbclid=IwAR28e8ZezI5MR6vIaSIVShmZltHDKoElIAUoUdAOtR-R-vOO_gkPNsD2J6o
https://github.com/sinara-hw/sinara/wiki/SchematicsReviewChecklist?fbclid=IwAR1BNygVAagBgiaVf0A0Y6eGzzE2ItLHPzbkBdk3sft3B9_OMpTz3JWIBnM