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v1.2rc2
1 parent ae436d5 commit 327c335

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Lines changed: 63 additions & 27 deletions

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PCB/Fastino.PCBDOC

476 KB
Binary file not shown.

PCB/Fastino.PrjPCB

Lines changed: 61 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,4 @@
1-
[Design]
1+
[Design]
22
Version=1.0
33
HierarchyMode=2
44
ChannelRoomNamingStyle=0
@@ -322,7 +322,7 @@ UniqueID=D4AF54EA-FAA2-4C40-9817-EBA804A1C567
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Description=DNP parallel termination
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AllowFabrication=0
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ParameterCount=0
325-
VariationCount=128
325+
VariationCount=129
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Variation1=Designator=C35_1|UniqueId=\1XGIDEBDC\NVDAUZTR|Kind=1|AlternatePart=
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Variation2=Designator=C68_1|UniqueId=\1XGIDEBDC\RVMURFZW|Kind=1|AlternatePart=
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Variation3=Designator=C68_2|UniqueId=\2XGIDEBDC\RVMURFZW|Kind=1|AlternatePart=
@@ -451,8 +451,21 @@ Variation125=Designator=C89_11|UniqueId=\11XGIDEBDC\ZBRMLAPC|Kind=1|AlternatePar
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Variation126=Designator=C89_14|UniqueId=\14XGIDEBDC\ZBRMLAPC|Kind=1|AlternatePart=
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Variation127=Designator=C89_13|UniqueId=\13XGIDEBDC\ZBRMLAPC|Kind=1|AlternatePart=
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Variation128=Designator=C89_6|UniqueId=\6XGIDEBDC\ZBRMLAPC|Kind=1|AlternatePart=
454+
Variation129=Designator=R7|UniqueId=\VEBUTSPR\IJJJGDKR|Kind=1|AlternatePart=
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ParamVariationCount=0
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457+
[GeneratedDocument1]
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DocumentPath=Project Outputs for Fastino\Panel\Panel_Fastino(DNP parallel termination).step
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DItemRevisionGUID=
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[GeneratedDocument2]
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DocumentPath=Project Outputs for Fastino\Panel\Panel_Fastino.brd
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DItemRevisionGUID=
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[GeneratedDocument3]
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DocumentPath=Project Outputs for Fastino\Panel\Panel_Fastino.DXF
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DItemRevisionGUID=
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[SearchPath1]
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Path=Z:\PCBs\altium\CernLib_2020.03.06\*.DbLib
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IncludeSubFolders=1
@@ -593,7 +606,7 @@ OutputDefault20=0
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[OutputGroup2]
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Name=Simulator Outputs
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Description=
596-
TargetPrinter=Canon MG7700 series Printer WS
609+
TargetPrinter=Brother DCP-J315W Printer
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PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
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[OutputGroup3]
@@ -663,6 +676,12 @@ OutputDocumentPath10=
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OutputVariantName10=[No Variations]
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OutputDefault10=0
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PageOptions10=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9
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OutputType11=PDF3D MBA
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OutputName11=PDF3D MBA
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OutputDocumentPath11=
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OutputVariantName11=
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OutputDefault11=0
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PageOptions11=Record=PageOptions|CenterHorizontal=True|CenterVertical=True|PrintScale=1.00|XCorrection=1.00|YCorrection=1.00|PrintKind=1|BorderSize=5000000|LeftOffset=0|BottomOffset=0|Orientation=2|PaperLength=1000|PaperWidth=1000|Scale=100|PaperSource=7|PrintQuality=-3|MediaType=1|DitherType=10|PrintScaleMode=1|PaperKind=A4|PaperIndex=9
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[OutputGroup4]
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Name=Assembly Outputs
@@ -1069,6 +1088,16 @@ OutputName9=Specctra Design PCB
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OutputDocumentPath9=
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OutputVariantName9=
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OutputDefault9=0
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OutputType10=MBAExportPARASOLID
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OutputName10=Export PARASOLID
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OutputDocumentPath10=
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OutputVariantName10=
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OutputDefault10=0
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OutputType11=MBAExportSTEP
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OutputName11=Export STEP
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OutputDocumentPath11=
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OutputVariantName11=
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OutputDefault11=0
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[OutputGroup10]
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Name=PostProcess Outputs
@@ -1199,6 +1228,8 @@ Type114=1
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Type115=1
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Type116=1
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Type117=1
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Type118=1
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Type119=1
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[Difference Levels]
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Type1=1
@@ -1267,6 +1298,8 @@ Type63=1
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Type64=1
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Type65=1
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Type66=1
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Type67=1
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Type68=1
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[Electrical Rules Check]
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Type1=1
@@ -1275,33 +1308,33 @@ Type3=2
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Type4=1
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Type5=2
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Type6=2
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Type7=1
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Type7=0
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Type8=1
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Type9=1
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Type10=1
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Type11=2
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Type12=2
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Type13=2
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Type12=0
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Type13=0
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Type14=1
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Type15=1
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Type16=1
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Type17=1
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Type18=1
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Type19=1
1291-
Type20=1
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Type21=1
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Type22=1
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Type23=1
1324+
Type20=0
1325+
Type21=0
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Type22=0
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Type23=0
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Type24=1
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Type25=2
1297-
Type26=2
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Type26=0
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Type27=2
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Type28=1
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Type29=1
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Type30=1
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Type31=1
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Type32=2
1304-
Type33=2
1337+
Type33=0
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Type34=2
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Type35=1
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Type36=2
@@ -1312,26 +1345,26 @@ Type40=2
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Type41=0
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Type42=2
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Type43=1
1315-
Type44=1
1316-
Type45=2
1317-
Type46=1
1318-
Type47=2
1319-
Type48=2
1320-
Type49=1
1348+
Type44=0
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Type45=0
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Type46=0
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Type47=0
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Type48=0
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Type49=0
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Type50=2
1322-
Type51=1
1323-
Type52=1
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Type51=0
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Type52=0
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Type53=1
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Type54=1
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Type55=1
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Type56=2
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Type57=1
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Type58=1
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Type59=0
1331-
Type60=1
1332-
Type61=2
1333-
Type62=2
1334-
Type63=1
1364+
Type60=0
1365+
Type61=0
1366+
Type62=0
1367+
Type63=0
13351368
Type64=0
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Type65=2
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Type66=3
@@ -1369,7 +1402,7 @@ Type97=2
13691402
Type98=0
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Type99=1
13711404
Type100=2
1372-
Type101=1
1405+
Type101=0
13731406
Type102=2
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Type103=2
13751408
Type104=1
@@ -1414,6 +1447,7 @@ L17=WNNNNNNNWNNNWWWWN
14141447
[Annotate]
14151448
SortOrder=3
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SortLocation=0
1450+
ReplaceSubparts=0
14171451
MatchParameter1=Comment
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MatchStrictly1=1
14191453
PhysicalNamingFormat=$Component_$RoomName
@@ -1432,6 +1466,7 @@ NetClassSeparateForBusSections=0
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[LibraryUpdateOptions]
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SelectedOnly=0
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UpdateVariants=1
1469+
UpdateToLatestRevision=1
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PartTypes=0
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FullReplace=1
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UpdateDesignatorLock=1
@@ -1450,6 +1485,7 @@ UpdateCurrentModels=1
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[DatabaseUpdateOptions]
14511486
SelectedOnly=0
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UpdateVariants=1
1488+
UpdateToLatestRevision=1
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PartTypes=0
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[Comparison Options]

PCB/Fastino_FPGA_LVDS.SchDoc

1 KB
Binary file not shown.

Panel/Panel_Fastino.OutJob

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -18,10 +18,10 @@ RevisionNamingSchemeGUID=
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Name=Panel_Fastino.OutJob
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Description=
2020
TargetOutputMedium=Folder Structure
21-
VariantName=[No Variations]
21+
VariantName=DNP parallel termination
2222
VariantScope=1
2323
CurrentConfigurationName=
24-
TargetPrinter=Brother MFC-L2710DW series Printer
24+
TargetPrinter=Brother DCP-J315W Printer
2525
PrinterOptions=Record=PrinterOptions|Copies=1|Duplex=1|TrueTypeOptions=3|Collate=1|PrintJobKind=1|PrintWhat=1
2626
OutputMedium1=Print Job
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OutputMedium1_Type=Printer

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