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Copy file name to clipboardExpand all lines: docs/hardware_overview.md
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@@ -139,6 +139,8 @@ If you have the **`CONFIG ESP32 USB Port`** connected to a standard USB (2.0) po
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If you have **`CONFIG MOSAIC USB Port`** connected to a standard USB (2.0) port, ensure the Power Delivery Wall Adapter is connected to **`CONFIG ESP32 USB Port`**. The Power Path priority will ensure power is drawn from the **`CONFIG ESP32 USB Port`**.
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Consult page 9 of the [GNSSDO+ schematic](./assets/board_files/SparkPNT_GNSSDO_Plus_schematic.pdf) for more details
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??? tip "Measure Current Draw"
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If you want to measure the board's current draw, you can open the `MEAS` jumper and measure the current via a pair of breakout pads *(see the **[Jumpers](#jumpers-gnssdo)** section)*.
Copy file name to clipboardExpand all lines: docs/how_it_works.md
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icon: material/tools
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---
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## How It Works
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As the name suggests, the SparkPNT GNSS Disciplined Oscillator (GNSSDO) and GNSS Disciplined Oscillator Plus (GNSSDO+) are very precise 10MHz disciplined oscillators.
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Inside, the Septentrio mosaic-T GNSS provides all-in-view satellite tracking: multi-constellation, and multi-frequency. It has dedicated timing features for time and clock synchronisation. Using the clock bias measurements from the mosaic-T, which it calculates by comparing the internal 10MHz clock to those of the GNSS satellites, the GNSSDO(+) is able to discipline (adjust) the frequency of the digitally-controlled oscillator to bring it as close to 10MHz as possible. Once the frequency has been adjusted, the accuracy of the mosaic-T's Pulse Per Second output is: better than 5ns; and better that 1ns with an optional subscription to [Fugro's AtomiChron](./atomichron.md) timing service. Take two GNSSDOs, place them anywhere on the planet and you can be confident that their time pulses are aligned to within 5ns or 1ns of each other...
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While the mosaic-T is acquiring a GNSS signal, the OLED display will show an Error such as "Measurements" or "Ephemerides":
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<figuremarkdown>
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[{ width="100" }](./assets/img/hookup_guide/OLED_1.png"Click to enlarge")
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[{ width="250" }](./assets/img/hookup_guide/OLED_1.png"Click to enlarge")
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On GNSSDO+, the firmware will now go into **Mode****WARMUP**. It can take approximately 10 minutes for the STP3593LF double-oven oscillator temperature to stabilise.
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<figuremarkdown>
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[{ width="100" }](./assets/img/hookup_guide/OLED_2.png"Click to enlarge")
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[{ width="250" }](./assets/img/hookup_guide/OLED_2.png"Click to enlarge")
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The OLED display will display the clock Bias. You can watch the Bias change, slowly at first, reaching a limit of: 500ns/s on GNSSDO; and 250ns/s on GNSSDO+.
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<figuremarkdown>
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[{ width="100" }](./assets/img/hookup_guide/OLED_4.png"Click to enlarge")
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[{ width="250" }](./assets/img/hookup_guide/OLED_4.png"Click to enlarge")
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<figcaptionmarkdown>OLED showing Bias in microseconds.</figcaption>
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</figure>
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PPS output is started when the firmware enters this state for the first time (since power-on).
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<figuremarkdown>
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[{ width="100" }](./assets/img/hookup_guide/OLED_5.png"Click to enlarge")
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[{ width="250" }](./assets/img/hookup_guide/OLED_5.png"Click to enlarge")
[Purchase from SparkFun :fontawesome-solid-cart-plus:{ .heart } { .tinyqr }](https://www.sparkfun.com/sparkpnt-gnss-disciplined-oscillator.html){ .md-button .md-button--primary }
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</article>
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</div>
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<divclass="grid cards desc"markdown>
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- Designed and manufactured in Boulder, Colorado, USA, the SparkPNT GNSSDO / GNSSDO+ are the perfect solution for your high-precision timing needs. Based around the multi-constellation, multi-frequency, L5-ready mosaic-T from Septentrio, these are our most accurate GNSS timing product to date. The GNSSDO features a SiTime SiT5358 disciplined 10MHz Digitally-Controlled Temperature-Controlled Crystal Oscillator (DCTCXO) providing excellent clock accuracy and stability. The GNSSDO+ gets an upgrade from the Rakon STP3593LF disciplined 10MHz Digitally-Controlled Double-Oven Crystal Oscillator (OCXO) providing superb clock accuracy, stability and holdover. The mosaic-T also has built-in on-module support for the Fugro AtomiChron L-band timing service.
Copy file name to clipboardExpand all lines: docs/oscillator.md
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The firmware monitors the message blocks on `COM1`. The `ERROR` LED follows the **PVTGeodetic Error** code. The LED is extinguished when **Error** is zero.
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In STATE_GNSS_CONFIGURED:
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* The firmware waits for the **ReceiverTime**`FINETIME` bit to be set, indicating the **setClockSyncThreshold**`Threshold` (usec500) has been achieved
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- The firmware waits for the **ReceiverTime**`FINETIME` bit to be set, indicating the **setClockSyncThreshold**`Threshold` (usec500) has been achieved
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In STATE_TCXO_WARMUP (GNSSDO+ only):
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* The firmware waits for `tcxoMinWarmup_s` and for the OCXO temperature to become stable
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- The firmware waits for `tcxoMinWarmup_s` and for the OCXO temperature to become stable
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In STATE_GNSS_FINETIME:
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* The firmware disciplines the TCXO / OCXO frequency in a simple frequency locked loop
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* The firmware exits this state when the change in the `tcxoClockBias_ms` (`RxClkBias`) is better than the specified `rxStabilityForFrequencyLock`
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* The PI loop uses `PkSteer` and `IkSteer` when frequency locking
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- The firmware disciplines the TCXO / OCXO frequency in a simple frequency locked loop
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- The firmware exits this state when the change in the `tcxoClockBias_ms` (`RxClkBias`) is better than the specified `rxStabilityForFrequencyLock`
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- The PI loop uses `PkSteer` and `IkSteer` when frequency locking
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In STATE_GNSS_FREQUENCY_LOCK:
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* The TCXO / OCXO bias is driven towards zero
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* The initial bias error can be up to 500us, so we need to ramp the TCXO frequency one way ('up') and then back again ('down')
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* We slowly accelerate the change in frequency, maintain it at `tcxoRampRateLimit_sps`, then decelerate
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* The acceleration is set by the `tcxoRampStepSize_s`: 0.5ns/s for the STP3593; the SiT5358 can accelerate faster
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* The ramps help to avoid blowing up the integrator
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* When the ramps are complete, the `tcxoClockBias_ms` (`RxClkBias`) is re-checked
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* This state is repeated if the bias is still excessive (> `rxPhaseErrorLimit_s`)
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* The PI loop uses `PkRamp` and `IkRamp` when following the ramps
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- The TCXO / OCXO bias is driven towards zero
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- The initial bias error can be up to 500us, so we need to ramp the TCXO frequency one way ('up') and then back again ('down')
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- We slowly accelerate the change in frequency, maintain it at `tcxoRampRateLimit_sps`, then decelerate
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- The acceleration is set by the `tcxoRampStepSize_s`: 0.5ns/s for the STP3593; the SiT5358 can accelerate faster
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- The ramps help to avoid blowing up the integrator
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- When the ramps are complete, the `tcxoClockBias_ms` (`RxClkBias`) is re-checked
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- This state is repeated if the bias is still excessive (> `rxPhaseErrorLimit_s`)
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- The PI loop uses `PkRamp` and `IkRamp` when following the ramps
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In STATE_GNSS_PHASE_LOCK:
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* The LOCK LED will be illuminated when the firmware is in STATE_GNSS_PHASE_LOCK
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* PPS output will be started when entering STATE_GNSS_PHASE_LOCK for the first time
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* This state uses a conventional PLL to drive the `tcxoClockBias_ms` (`RxClkBias`) to zero
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* The P and I terms are `Pk` and `Ik`
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* When entering STATE_GNSS_PHASE_LOCK from STATE_GNSS_FREQUENCY_LOCK, the P and I terms are ramped from `PkRamp` and `IkRamp` to `Pk` and `Ik` over `phaseLockPIRampTime_s` (120s)
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* This helps to avoid shocking the PI loop and sending the bias off for a walk...
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- The LOCK LED will be illuminated when the firmware is in STATE_GNSS_PHASE_LOCK
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- PPS output will be started when entering STATE_GNSS_PHASE_LOCK for the first time
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- This state uses a conventional PLL to drive the `tcxoClockBias_ms` (`RxClkBias`) to zero
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- The P and I terms are `Pk` and `Ik`
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- When entering STATE_GNSS_PHASE_LOCK from STATE_GNSS_FREQUENCY_LOCK, the P and I terms are ramped from `PkRamp` and `IkRamp` to `Pk` and `Ik` over `phaseLockPIRampTime_s` (120s)
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- This helps to avoid shocking the PI loop and sending the bias off for a walk...
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The firmware monitors the **PVTGeodetic RxClkBias** (as 64-bit float in milliseconds). When **RxClkBias** is positive, receiver time is ahead of system time and the oscillator frequency should be reduced. When **RxClkBias** is negative, receiver time is behind system time and the oscillator frequency should be increased. The firmware will adjust the oscillator frequency via its Digital Frequency Control register accordingly. As per Appendix D, the frequency will be changed by no more than 3ppb per second.
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