Skip to content

Commit 79d9c69

Browse files
anatgstarkwareanatgstarkware
committed
Add log_size fn to CircuitEval
1 parent ff859e1 commit 79d9c69

102 files changed

Lines changed: 656 additions & 17 deletions

File tree

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

‎Cargo.lock‎

Lines changed: 1 addition & 2 deletions
Some generated files are not rendered by default. Learn more about customizing how changed files appear on GitHub.

‎crates/cairo_verifier/src/components/add_ap_opcode.rs‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -157,6 +157,13 @@ impl<Value: IValue> CircuitEval<Value> for Component {
157157
fn relation_uses_per_row(&self) -> &[RelationUse] {
158158
&RELATION_USES_PER_ROW
159159
}
160+
161+
fn log_size(
162+
&self,
163+
_preprocessed_column_log_sizes: &OrderedHashMap<PreProcessedColumnId, u32>,
164+
) -> Option<u32> {
165+
None
166+
}
160167
}
161168
#[cfg(test)]
162169
mod tests {

‎crates/cairo_verifier/src/components/add_mod_builtin.rs‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -902,6 +902,13 @@ impl<Value: IValue> CircuitEval<Value> for Component {
902902
fn relation_uses_per_row(&self) -> &[RelationUse] {
903903
&RELATION_USES_PER_ROW
904904
}
905+
906+
fn log_size(
907+
&self,
908+
_preprocessed_column_log_sizes: &OrderedHashMap<PreProcessedColumnId, u32>,
909+
) -> Option<u32> {
910+
None
911+
}
905912
}
906913
#[cfg(test)]
907914
mod tests {

‎crates/cairo_verifier/src/components/add_opcode.rs‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -451,6 +451,13 @@ impl<Value: IValue> CircuitEval<Value> for Component {
451451
fn relation_uses_per_row(&self) -> &[RelationUse] {
452452
&RELATION_USES_PER_ROW
453453
}
454+
455+
fn log_size(
456+
&self,
457+
_preprocessed_column_log_sizes: &OrderedHashMap<PreProcessedColumnId, u32>,
458+
) -> Option<u32> {
459+
None
460+
}
454461
}
455462
#[cfg(test)]
456463
mod tests {

‎crates/cairo_verifier/src/components/add_opcode_small.rs‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -244,6 +244,13 @@ impl<Value: IValue> CircuitEval<Value> for Component {
244244
fn relation_uses_per_row(&self) -> &[RelationUse] {
245245
&RELATION_USES_PER_ROW
246246
}
247+
248+
fn log_size(
249+
&self,
250+
_preprocessed_column_log_sizes: &OrderedHashMap<PreProcessedColumnId, u32>,
251+
) -> Option<u32> {
252+
None
253+
}
247254
}
248255
#[cfg(test)]
249256
mod tests {

‎crates/cairo_verifier/src/components/assert_eq_opcode.rs‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -139,6 +139,13 @@ impl<Value: IValue> CircuitEval<Value> for Component {
139139
fn relation_uses_per_row(&self) -> &[RelationUse] {
140140
&RELATION_USES_PER_ROW
141141
}
142+
143+
fn log_size(
144+
&self,
145+
_preprocessed_column_log_sizes: &OrderedHashMap<PreProcessedColumnId, u32>,
146+
) -> Option<u32> {
147+
None
148+
}
142149
}
143150
#[cfg(test)]
144151
mod tests {

‎crates/cairo_verifier/src/components/assert_eq_opcode_double_deref.rs‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -169,6 +169,13 @@ impl<Value: IValue> CircuitEval<Value> for Component {
169169
fn relation_uses_per_row(&self) -> &[RelationUse] {
170170
&RELATION_USES_PER_ROW
171171
}
172+
173+
fn log_size(
174+
&self,
175+
_preprocessed_column_log_sizes: &OrderedHashMap<PreProcessedColumnId, u32>,
176+
) -> Option<u32> {
177+
None
178+
}
172179
}
173180
#[cfg(test)]
174181
mod tests {

‎crates/cairo_verifier/src/components/assert_eq_opcode_imm.rs‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -119,6 +119,13 @@ impl<Value: IValue> CircuitEval<Value> for Component {
119119
fn relation_uses_per_row(&self) -> &[RelationUse] {
120120
&RELATION_USES_PER_ROW
121121
}
122+
123+
fn log_size(
124+
&self,
125+
_preprocessed_column_log_sizes: &OrderedHashMap<PreProcessedColumnId, u32>,
126+
) -> Option<u32> {
127+
None
128+
}
122129
}
123130
#[cfg(test)]
124131
mod tests {

‎crates/cairo_verifier/src/components/bitwise_builtin.rs‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -723,6 +723,13 @@ impl<Value: IValue> CircuitEval<Value> for Component {
723723
fn relation_uses_per_row(&self) -> &[RelationUse] {
724724
&RELATION_USES_PER_ROW
725725
}
726+
727+
fn log_size(
728+
&self,
729+
_preprocessed_column_log_sizes: &OrderedHashMap<PreProcessedColumnId, u32>,
730+
) -> Option<u32> {
731+
None
732+
}
726733
}
727734
#[cfg(test)]
728735
mod tests {

‎crates/cairo_verifier/src/components/blake_compress_opcode.rs‎

Lines changed: 7 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -655,6 +655,13 @@ impl<Value: IValue> CircuitEval<Value> for Component {
655655
fn relation_uses_per_row(&self) -> &[RelationUse] {
656656
&RELATION_USES_PER_ROW
657657
}
658+
659+
fn log_size(
660+
&self,
661+
_preprocessed_column_log_sizes: &OrderedHashMap<PreProcessedColumnId, u32>,
662+
) -> Option<u32> {
663+
None
664+
}
658665
}
659666
#[cfg(test)]
660667
mod tests {

0 commit comments

Comments
 (0)