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Commit 7968394

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dojyorinfpistm
dojyorin
authored and
fpistm
committed
chore: unify clock configuration of H5.
Signed-off-by: dojyorin <[email protected]>
1 parent 7ef0723 commit 7968394

14 files changed

+255
-259
lines changed

Diff for: ‎variants/STM32H5xx/H503CB(T-U)/generic_clock.c

+12-18
Original file line numberDiff line numberDiff line change
@@ -33,20 +33,20 @@ WEAK void SystemClock_Config(void)
3333
/** Initializes the RCC Oscillators according to the specified parameters
3434
* in the RCC_OscInitTypeDef structure.
3535
*/
36-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI
37-
| RCC_OSCILLATORTYPE_CSI;
38-
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
39-
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
36+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48
37+
| RCC_OSCILLATORTYPE_LSI;
4038
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
4139
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
40+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
41+
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
4242
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
4343
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
44-
RCC_OscInitStruct.PLL.PLLM = 1;
45-
RCC_OscInitStruct.PLL.PLLN = 125;
44+
RCC_OscInitStruct.PLL.PLLM = 2;
45+
RCC_OscInitStruct.PLL.PLLN = 250;
4646
RCC_OscInitStruct.PLL.PLLP = 2;
4747
RCC_OscInitStruct.PLL.PLLQ = 10;
4848
RCC_OscInitStruct.PLL.PLLR = 2;
49-
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
49+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1;
5050
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
5151
RCC_OscInitStruct.PLL.PLLFRACN = 0;
5252
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
@@ -55,15 +55,14 @@ WEAK void SystemClock_Config(void)
5555

5656
/** Initializes the CPU, AHB and APB buses clocks
5757
*/
58-
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
58+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK
5959
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
6060
| RCC_CLOCKTYPE_PCLK3;
6161
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
6262
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
6363
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
6464
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
6565
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
66-
6766
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
6867
Error_Handler();
6968
}
@@ -78,29 +77,24 @@ WEAK void SystemClock_Config(void)
7877
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1
7978
| RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3;
8079
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
81-
PeriphClkInitStruct.PLL2.PLL2M = 1;
82-
PeriphClkInitStruct.PLL2.PLL2N = 125;
80+
PeriphClkInitStruct.PLL2.PLL2M = 2;
81+
PeriphClkInitStruct.PLL2.PLL2N = 250;
8382
PeriphClkInitStruct.PLL2.PLL2P = 2;
8483
PeriphClkInitStruct.PLL2.PLL2Q = 15;
8584
PeriphClkInitStruct.PLL2.PLL2R = 4;
86-
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
85+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1;
8786
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
8887
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
8988
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
90-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
9189
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
90+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
9291
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
9392
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
9493
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
9594
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
9695
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
9796
Error_Handler();
9897
}
99-
100-
101-
/** Configure the programming delay
102-
*/
103-
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
10498
}
10599

106100
#endif /* ARDUINO_GENERIC_* */

Diff for: ‎variants/STM32H5xx/H503KBU/generic_clock.c

+22-18
Original file line numberDiff line numberDiff line change
@@ -33,64 +33,68 @@ WEAK void SystemClock_Config(void)
3333
/** Initializes the RCC Oscillators according to the specified parameters
3434
* in the RCC_OscInitTypeDef structure.
3535
*/
36-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI
37-
| RCC_OSCILLATORTYPE_CSI;
38-
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
39-
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
36+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48
37+
| RCC_OSCILLATORTYPE_LSI;
4038
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
4139
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
40+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
41+
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
4242
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
4343
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
44-
RCC_OscInitStruct.PLL.PLLM = 1;
45-
RCC_OscInitStruct.PLL.PLLN = 125;
44+
RCC_OscInitStruct.PLL.PLLM = 2;
45+
RCC_OscInitStruct.PLL.PLLN = 250;
4646
RCC_OscInitStruct.PLL.PLLP = 2;
47-
RCC_OscInitStruct.PLL.PLLQ = 2;
47+
RCC_OscInitStruct.PLL.PLLQ = 10;
4848
RCC_OscInitStruct.PLL.PLLR = 2;
49-
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
49+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1;
5050
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
5151
RCC_OscInitStruct.PLL.PLLFRACN = 0;
52-
5352
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
5453
Error_Handler();
5554
}
5655

5756
/** Initializes the CPU, AHB and APB buses clocks
5857
*/
59-
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
58+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK
6059
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
6160
| RCC_CLOCKTYPE_PCLK3;
6261
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
6362
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
6463
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
6564
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
6665
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
67-
6866
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
6967
Error_Handler();
7068
}
7169

70+
/** Configure the programming delay
71+
*/
72+
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
73+
7274
/** Initializes the peripherals clock
7375
*/
7476
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
75-
| RCC_PERIPHCLK_USB;
77+
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1
78+
| RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3;
7679
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
77-
PeriphClkInitStruct.PLL2.PLL2M = 1;
78-
PeriphClkInitStruct.PLL2.PLL2N = 125;
80+
PeriphClkInitStruct.PLL2.PLL2M = 2;
81+
PeriphClkInitStruct.PLL2.PLL2N = 250;
7982
PeriphClkInitStruct.PLL2.PLL2P = 2;
8083
PeriphClkInitStruct.PLL2.PLL2Q = 15;
8184
PeriphClkInitStruct.PLL2.PLL2R = 4;
82-
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
85+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1;
8386
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
8487
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
8588
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
86-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
8789
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
90+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
8891
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
89-
92+
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
93+
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;
94+
PeriphClkInitStruct.Spi3ClockSelection = RCC_SPI3CLKSOURCE_PLL1Q;
9095
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
9196
Error_Handler();
9297
}
93-
9498
}
9599

96100
#endif /* ARDUINO_GENERIC_* */

Diff for: ‎variants/STM32H5xx/H503RBT/generic_clock.c

+22-18
Original file line numberDiff line numberDiff line change
@@ -24,35 +24,38 @@ WEAK void SystemClock_Config(void)
2424
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
2525
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
2626

27-
/* Configure the main internal regulator output voltage */
27+
/** Configure the main internal regulator output voltage
28+
*/
2829
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
2930

3031
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
3132

32-
/* Initializes the RCC Oscillators according to the specified parameters
33-
* in the RCC_OscInitTypeDef structure.
34-
*/
35-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSI
36-
| RCC_OSCILLATORTYPE_CSI;
37-
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
38-
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
33+
/** Initializes the RCC Oscillators according to the specified parameters
34+
* in the RCC_OscInitTypeDef structure.
35+
*/
36+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48
37+
| RCC_OSCILLATORTYPE_LSI;
3938
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
4039
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
40+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
41+
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
4142
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
4243
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
43-
RCC_OscInitStruct.PLL.PLLM = 1;
44-
RCC_OscInitStruct.PLL.PLLN = 125;
44+
RCC_OscInitStruct.PLL.PLLM = 2;
45+
RCC_OscInitStruct.PLL.PLLN = 250;
4546
RCC_OscInitStruct.PLL.PLLP = 2;
4647
RCC_OscInitStruct.PLL.PLLQ = 10;
4748
RCC_OscInitStruct.PLL.PLLR = 2;
48-
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
49+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1;
4950
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
5051
RCC_OscInitStruct.PLL.PLLFRACN = 0;
5152
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
5253
Error_Handler();
5354
}
54-
/* Initializes the CPU, AHB and APB buses clocks */
55-
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
55+
56+
/** Initializes the CPU, AHB and APB buses clocks
57+
*/
58+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK
5659
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
5760
| RCC_CLOCKTYPE_PCLK3;
5861
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
@@ -68,22 +71,23 @@ WEAK void SystemClock_Config(void)
6871
*/
6972
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
7073

71-
/* Initializes the peripherals clock */
74+
/** Initializes the peripherals clock
75+
*/
7276
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
7377
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1
7478
| RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3;
7579
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
76-
PeriphClkInitStruct.PLL2.PLL2M = 1;
77-
PeriphClkInitStruct.PLL2.PLL2N = 125;
80+
PeriphClkInitStruct.PLL2.PLL2M = 2;
81+
PeriphClkInitStruct.PLL2.PLL2N = 250;
7882
PeriphClkInitStruct.PLL2.PLL2P = 2;
7983
PeriphClkInitStruct.PLL2.PLL2Q = 15;
8084
PeriphClkInitStruct.PLL2.PLL2R = 4;
81-
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
85+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1;
8286
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
8387
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
8488
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
85-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
8689
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
90+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
8791
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
8892
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
8993
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;

Diff for: ‎variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.cpp

+24-20
Original file line numberDiff line numberDiff line change
@@ -109,7 +109,8 @@ WEAK void SystemClock_Config(void)
109109
RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
110110
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {};
111111

112-
/* Configure the main internal regulator output voltage */
112+
/** Configure the main internal regulator output voltage
113+
*/
113114
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
114115

115116
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
@@ -120,37 +121,39 @@ WEAK void SystemClock_Config(void)
120121
HAL_PWR_EnableBkUpAccess();
121122
__HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
122123

123-
/* Initializes the RCC Oscillators according to the specified parameters in the RCC_OscInitTypeDef structure */
124-
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48 | RCC_OSCILLATORTYPE_LSE
125-
| RCC_OSCILLATORTYPE_CSI;
126-
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
127-
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
124+
/** Initializes the RCC Oscillators according to the specified parameters
125+
* in the RCC_OscInitTypeDef structure.
126+
*/
127+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_CSI | RCC_OSCILLATORTYPE_HSI48
128+
| RCC_OSCILLATORTYPE_LSE;
128129
RCC_OscInitStruct.CSIState = RCC_CSI_ON;
129130
RCC_OscInitStruct.CSICalibrationValue = RCC_CSICALIBRATION_DEFAULT;
131+
RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
132+
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
130133
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
131134
RCC_OscInitStruct.PLL.PLLSource = RCC_PLL1_SOURCE_CSI;
132-
RCC_OscInitStruct.PLL.PLLM = 1;
133-
RCC_OscInitStruct.PLL.PLLN = 125;
135+
RCC_OscInitStruct.PLL.PLLM = 2;
136+
RCC_OscInitStruct.PLL.PLLN = 250;
134137
RCC_OscInitStruct.PLL.PLLP = 2;
135138
RCC_OscInitStruct.PLL.PLLQ = 10;
136139
RCC_OscInitStruct.PLL.PLLR = 2;
137-
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_2;
140+
RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1_VCIRANGE_1;
138141
RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1_VCORANGE_WIDE;
139142
RCC_OscInitStruct.PLL.PLLFRACN = 0;
140143
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
141144
Error_Handler();
142145
}
143146

144-
/* Initializes the CPU, AHB and APB buses clocks */
145-
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
147+
/** Initializes the CPU, AHB and APB buses clocks
148+
*/
149+
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK
146150
| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2
147151
| RCC_CLOCKTYPE_PCLK3;
148152
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
149153
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
150154
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
151155
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
152156
RCC_ClkInitStruct.APB3CLKDivider = RCC_HCLK_DIV1;
153-
154157
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5) != HAL_OK) {
155158
Error_Handler();
156159
}
@@ -159,22 +162,23 @@ WEAK void SystemClock_Config(void)
159162
*/
160163
__HAL_FLASH_SET_PROGRAM_DELAY(FLASH_PROGRAMMING_DELAY_2);
161164

162-
/* Initializes the peripherals clock */
163-
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB | RCC_PERIPHCLK_ADCDAC
164-
| RCC_PERIPHCLK_LPUART1 | RCC_PERIPHCLK_SPI1
165+
/** Initializes the peripherals clock
166+
*/
167+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC | RCC_PERIPHCLK_LPUART1
168+
| RCC_PERIPHCLK_USB | RCC_PERIPHCLK_SPI1
165169
| RCC_PERIPHCLK_SPI2 | RCC_PERIPHCLK_SPI3;
166-
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_CSI;
167-
PeriphClkInitStruct.PLL2.PLL2M = 1;
168-
PeriphClkInitStruct.PLL2.PLL2N = 125;
170+
PeriphClkInitStruct.PLL2.PLL2Source = RCC_PLL2_SOURCE_HSE;
171+
PeriphClkInitStruct.PLL2.PLL2M = 2;
172+
PeriphClkInitStruct.PLL2.PLL2N = 250;
169173
PeriphClkInitStruct.PLL2.PLL2P = 2;
170174
PeriphClkInitStruct.PLL2.PLL2Q = 15;
171175
PeriphClkInitStruct.PLL2.PLL2R = 4;
172-
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_2;
176+
PeriphClkInitStruct.PLL2.PLL2RGE = RCC_PLL2_VCIRANGE_1;
173177
PeriphClkInitStruct.PLL2.PLL2VCOSEL = RCC_PLL2_VCORANGE_WIDE;
174178
PeriphClkInitStruct.PLL2.PLL2FRACN = 0;
175179
PeriphClkInitStruct.PLL2.PLL2ClockOut = RCC_PLL2_DIVQ | RCC_PLL2_DIVR;
176-
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
177180
PeriphClkInitStruct.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_PLL2R;
181+
PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PLL2Q;
178182
PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
179183
PeriphClkInitStruct.Spi1ClockSelection = RCC_SPI1CLKSOURCE_PLL1Q;
180184
PeriphClkInitStruct.Spi2ClockSelection = RCC_SPI2CLKSOURCE_PLL1Q;

Diff for: ‎variants/STM32H5xx/H503RBT/variant_NUCLEO_H503RB.h

+4-3
Original file line numberDiff line numberDiff line change
@@ -157,13 +157,14 @@
157157
#define PIN_SERIAL_TX PA4
158158
#endif
159159

160-
#define HSE_VALUE 24000000UL /*!< Value of the External oscillator in Hz */
161-
162160
// Extra HAL modules
163161
#if !defined(HAL_DAC_MODULE_DISABLED)
164162
#define HAL_DAC_MODULE_ENABLED
165163
#endif
166164

165+
// Value of the External oscillator in Hz
166+
#define HSE_VALUE 24000000UL
167+
167168
/*----------------------------------------------------------------------------
168169
* Arduino objects - C++ only
169170
*----------------------------------------------------------------------------*/
@@ -190,4 +191,4 @@
190191
#ifndef SERIAL_PORT_HARDWARE
191192
#define SERIAL_PORT_HARDWARE Serial
192193
#endif
193-
#endif
194+
#endif

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